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From: Richard Henderson <richard.henderson@linaro.org>
To: Ajeet Singh <itachis6234@gmail.com>, qemu-devel@nongnu.org
Cc: Warner Losh <imp@bsdimp.com>, Ajeet Singh <itachis@freebsd.org>,
	Stacey Son <sson@FreeBSD.org>
Subject: Re: [PATCH 06/23] Add Aarch64 register handling
Date: Mon, 17 Jun 2024 21:35:39 -0700	[thread overview]
Message-ID: <c6e6100e-6837-4f47-bb8c-5db5c7ba3aaa@linaro.org> (raw)
In-Reply-To: <20240617185804.25075-7-itachis@FreeBSD.org>

On 6/17/24 11:57, Ajeet Singh wrote:
> From: Stacey Son <sson@FreeBSD.org>
> 
> Header file for managing CPU register states in
> FreeBSD user mode
> 
> Signed-off-by: Stacey Son <sson@FreeBSD.org>
> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org>
> ---
>   bsd-user/aarch64/target_arch_reg.h | 56 ++++++++++++++++++++++++++++++
>   1 file changed, 56 insertions(+)
>   create mode 100644 bsd-user/aarch64/target_arch_reg.h
> 
> diff --git a/bsd-user/aarch64/target_arch_reg.h b/bsd-user/aarch64/target_arch_reg.h
> new file mode 100644
> index 0000000000..5c7154f0c1
> --- /dev/null
> +++ b/bsd-user/aarch64/target_arch_reg.h
> @@ -0,0 +1,56 @@
> +/*
> + *  FreeBSD arm64 register structures
> + *
> + *  Copyright (c) 2015 Stacey Son
> + *  All rights reserved.
> + *
> + *  This program is free software; you can redistribute it and/or modify
> + *  it under the terms of the GNU General Public License as published by
> + *  the Free Software Foundation; either version 2 of the License, or
> + *  (at your option) any later version.
> + *
> + *  This program is distributed in the hope that it will be useful,
> + *  but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *  GNU General Public License for more details.
> + *
> + *  You should have received a copy of the GNU General Public License
> + *  along with this program; if not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#ifndef TARGET_ARCH_REG_H
> +#define TARGET_ARCH_REG_H
> +
> +/* See sys/arm64/include/reg.h */
> +typedef struct target_reg {
> +    uint64_t        x[30];
> +    uint64_t        lr;
> +    uint64_t        sp;
> +    uint64_t        elr;
> +    uint64_t        spsr;
> +} target_reg_t;
> +
> +typedef struct target_fpreg {
> +    __uint128_t     fp_q[32];

I'm not keen on this, though possibly it doesn't matter for hosts that bsd-user is 
intended to support.  Better as either Int128 or uint64_t fp_q[32][2].

What is this structure used for within qemu?
Does freebsd support SVE yet?

It's certainly not used with this patch, so it's hard to tell, but can we omit it entirely 
for now?


r~


  reply	other threads:[~2024-06-18  4:36 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-17 18:57 [PATCH 00/23] ARM AArch64 Support for BSD Ajeet Singh
2024-06-17 18:57 ` [PATCH 01/23] Add CPU initialization function Ajeet Singh
2024-06-18  4:17   ` Richard Henderson
2024-06-22 18:37     ` Warner Losh
2024-06-17 18:57 ` [PATCH 02/23] Added CPU loop function Ajeet Singh
2024-06-18  4:24   ` Richard Henderson
2024-06-22 18:49     ` Warner Losh
2024-06-23 16:30       ` Richard Henderson
2024-06-17 18:57 ` [PATCH 03/23] Added function to clone CPU state Ajeet Singh
2024-06-18  4:27   ` Richard Henderson
2024-06-17 18:57 ` [PATCH 04/23] AArch64 specific CPU for bsd-user Ajeet Singh
2024-06-18  4:28   ` Richard Henderson
2024-06-17 18:57 ` [PATCH 05/23] Managing CPU register for BSD-USER Ajeet Singh
2024-06-18  4:28   ` Richard Henderson
2024-06-17 18:57 ` [PATCH 06/23] Add Aarch64 register handling Ajeet Singh
2024-06-18  4:35   ` Richard Henderson [this message]
2024-06-23 20:37     ` Warner Losh
2024-06-17 18:57 ` [PATCH 07/23] Add ARM AArch64 TLS Management Prototypes for BSD-User Ajeet Singh
2024-06-18  4:38   ` Richard Henderson
2024-06-17 18:57 ` [PATCH 08/23] Add Aarch64 sysarch() system call emulation for BSD-USER Ajeet Singh
2024-06-18  4:39   ` Richard Henderson
2024-06-17 18:57 ` [PATCH 09/23] Add thread setup " Ajeet Singh
2024-06-18 22:07   ` Richard Henderson
2024-06-17 18:57 ` [PATCH 10/23] Add thread initialization " Ajeet Singh
2024-06-18 22:10   ` Richard Henderson
2024-06-17 18:57 ` [PATCH 11/23] Update ARM AArch64 VM parameter definitions for bsd-user Ajeet Singh
2024-06-18 22:16   ` Richard Henderson
2024-06-22 18:56     ` Warner Losh
2024-06-17 18:57 ` [PATCH 12/23] Add ability to get rval2 Ajeet Singh
2024-06-18 22:17   ` Richard Henderson
2024-06-23 22:48     ` Warner Losh
2024-06-17 18:57 ` [PATCH 13/23] Add ARM AArch64 ELF definitions for bsd-user Ajeet Singh
2024-06-18 22:18   ` Richard Henderson
2024-06-17 18:57 ` [PATCH 14/23] Add ARM AArch64 hardware capability definitions Ajeet Singh
2024-06-18 22:20   ` Richard Henderson
2024-06-17 18:57 ` [PATCH 15/23] Add function to retrieve ARM AArch64 hardware capabilities Ajeet Singh
2024-06-18 22:21   ` Richard Henderson
2024-06-17 18:57 ` [PATCH 16/23] Add function to retrieve additional ARM AArch64 hwcap Ajeet Singh
2024-06-18 22:22   ` Richard Henderson
2024-06-17 18:57 ` [PATCH 17/23] Add ARM AArch64 sigcode setup function for bsd-user Ajeet Singh
2024-06-18 22:32   ` Richard Henderson
2024-06-17 18:57 ` [PATCH 18/23] Add ARM AArch64 specific signal definitions " Ajeet Singh
2024-06-18 22:35   ` Richard Henderson
2024-06-17 18:58 ` [PATCH 19/23] Add ARM AArch64 signal trampoline argument setup " Ajeet Singh
2024-06-18 22:37   ` Richard Henderson
2024-06-17 18:58 ` [PATCH 20/23] Add get_mcontext function for ARM AArch64 in bsd-user Ajeet Singh
2024-06-18 22:47   ` Richard Henderson
2024-06-17 18:58 ` [PATCH 21/23] Add setup_sigframe_arch " Ajeet Singh
2024-06-18 22:49   ` Richard Henderson
2024-06-17 18:58 ` [PATCH 22/23] Add set_mcontext " Ajeet Singh
2024-06-18 22:50   ` Richard Henderson
2024-06-23 15:54     ` Warner Losh
2024-06-23 17:48       ` Richard Henderson
2024-06-17 18:58 ` [PATCH 23/23] Add get_ucontext_sigreturn function Ajeet Singh
2024-06-18 22:56   ` Richard Henderson
2024-06-23 16:01     ` Warner Losh

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