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Tue, 23 Jul 2024 05:01:54 +0000 (GMT) Message-ID: Date: Tue, 23 Jul 2024 10:31:53 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 2/5] target/ppc: Add Power11 DD2.0 processor To: Nicholas Piggin , Mahesh J Salgaonkar , Madhavan Srinivasan , =?UTF-8?Q?C=C3=A9dric_Le_Goater?= , Harsh Prateek Bora Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, Daniel Henrique Barboza , =?UTF-8?B?RnLDqWTDqXJpYyBCYXJyYXQ=?= References: <20240606121657.254308-1-adityag@linux.ibm.com> <20240606121657.254308-3-adityag@linux.ibm.com> Content-Language: en-US From: Aditya Gupta In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: xFTH97NMHFcTgzsWAfqPZsTEK78r6-cS X-Proofpoint-GUID: O7_uiAeDI4mYdPpXFhZxI7lR7CIQA1LN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-22_18,2024-07-23_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 spamscore=0 bulkscore=0 suspectscore=0 mlxscore=0 clxscore=1015 mlxlogscore=744 impostorscore=0 phishscore=0 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2407230034 Received-SPF: pass client-ip=148.163.156.1; envelope-from=adityag@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Nick, On 23/07/24 10:00, Nicholas Piggin wrote: >> <...snip...> >> >> + { /* POWER11, ISA3.10 */ >> + .name = "power11", >> + .pvr = CPU_POWERPC_LOGICAL_3_10_PLUS, > Might call that _P11 rather than _PLUS, but I can fold that in my tree. Sure, makes sense, I can make these changes, and send a v2 soon. >> <...snip...> >> >> + >> +POWERPC_FAMILY(POWER11)(ObjectClass *oc, void *data) >> +{ >> + DeviceClass *dc = DEVICE_CLASS(oc); >> + PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); >> + >> + dc->fw_name = "PowerPC,POWER11"; >> + dc->desc = "POWER11"; >> + pcc->pvr_match = ppc_pvr_match_power11; >> + pcc->pcr_mask = POWERPC_POWER10_PCC_PCR_MASK; >> + pcc->pcr_supported = POWERPC_POWER10_PCC_PCR_SUPPORTED; >> + pcc->init_proc = init_proc_POWER10; >> + pcc->check_pow = check_pow_nocheck; >> + pcc->check_attn = check_attn_hid0_power9; >> + pcc->insns_flags = POWERPC_FAMILY_POWER9_INSNS_FLAGS; /* same as P9 */ >> + pcc->insns_flags2 = POWERPC_FAMILY_POWER10_INSNS_FLAGS2; >> + pcc->msr_mask = POWERPC_POWER10_PCC_MSR_MASK; >> + pcc->lpcr_mask = POWERPC_POWER10_PCC_LPCR_MASK; > BTW., I still think all these new macros should be named after the exact > CPU, e.g., all these should be called POWER11 and the differences or > sameness should be handled in cpu_init.h. Got it, can create macros for the Power11 things also. Regarding this: > + pcc->check_attn = check_attn_hid0_power9; > + pcc->insns_flags = POWERPC_FAMILY_POWER9_INSNS_FLAGS; /* same as P9 */ Should I keep them same, or have *_POWER11_* counterparts ? > > I might tweak that and the names a bit locally (e.g., why is one type of > define called POWERPC_FAMILY_x and another called POWERPC_x_PCC), but > that's not a big deal and mostly an exercise in bike shed painting. The > functionality of the patch looks okay. I am okay if you want to do it, or i can do it in a separate follow up patch. > Reviewed-by: Nicholas Piggin Thanks for the tag Nick ! - Aditya Gupta > >> + >> + pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE; >> + pcc->mmu_model = POWERPC_MMU_3_00; >> +#if !defined(CONFIG_USER_ONLY) >> + /* segment page size remain the same */ >> + pcc->hash64_opts = &ppc_hash64_opts_POWER7; >> + pcc->radix_page_info = &POWER10_radix_page_info; >> + pcc->lrg_decr_bits = 56; >> +#endif >> + pcc->excp_model = POWERPC_EXCP_POWER10; >> + pcc->bus_model = PPC_FLAGS_INPUT_POWER9; >> + pcc->bfd_mach = bfd_mach_ppc64; >> + pcc->flags = POWERPC_POWER10_PCC_FLAGS; >> + pcc->l1_dcache_size = 0x8000; >> + pcc->l1_icache_size = 0x8000; >> +} >> + >> #if !defined(CONFIG_USER_ONLY) >> void cpu_ppc_set_vhyp(PowerPCCPU *cpu, PPCVirtualHypervisor *vhyp) >> {