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Mon, 27 Jun 2022 17:06:10 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 53E2B4C040; Mon, 27 Jun 2022 17:06:10 +0000 (GMT) Received: from [9.171.40.136] (unknown [9.171.40.136]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 27 Jun 2022 17:06:08 +0000 (GMT) Message-ID: Date: Mon, 27 Jun 2022 19:06:07 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH] target/s390x/tcg: SPX: check validity of new prefix Content-Language: en-US To: David Hildenbrand , qemu-s390x@nongnu.org, Richard Henderson Cc: Cornelia Huck , Thomas Huth , qemu-devel@nongnu.org References: <20220627131251.2832076-1-scgl@linux.ibm.com> From: Janis Schoetterl-Glausch In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: tJk8FZmhpnmlPIKLFNJbDvmN6wltKOHs X-Proofpoint-GUID: FiytZdXOJ0QLz6XozCiT_CJxyWDEEmh5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-06-27_06,2022-06-24_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 mlxscore=0 bulkscore=0 mlxlogscore=904 phishscore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 suspectscore=0 adultscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2204290000 definitions=main-2206270070 Received-SPF: pass client-ip=148.163.158.5; envelope-from=scgl@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 6/27/22 18:27, David Hildenbrand wrote: > On 27.06.22 15:12, Janis Schoetterl-Glausch wrote: >> According to the architecture, SET PREFIX must try to access the new >> prefix area and recognize an addressing exception if the area is not >> accessible. >> For qemu this check prevents a crash in cpu_map_lowcore after an >> inaccessible prefix area has been set. > > I don't think that's possible. Our memory increments are 1 MiB and one > would have to cross a 1~MiB range with the second page to trigger that. > IIRC that's impossible with SPX address alignment requirements? > Are you saying that checking the first page is sufficient? I'm not sure that this the case for the architecture in general, but I guess it is true for tcg. Do you want me to remove the second check? > >> >> Signed-off-by: Janis Schoetterl-Glausch >> --- >> >> >> Is there a stricter check to see if the memory is accessible? >> >> >> target/s390x/tcg/misc_helper.c | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/target/s390x/tcg/misc_helper.c b/target/s390x/tcg/misc_helper.c >> index aab9c47747..c8447b36fc 100644 >> --- a/target/s390x/tcg/misc_helper.c >> +++ b/target/s390x/tcg/misc_helper.c >> @@ -158,6 +158,10 @@ void HELPER(spx)(CPUS390XState *env, uint64_t a1) >> if (prefix == old_prefix) { >> return; >> } >> + if (!mmu_absolute_addr_valid(prefix, true) || >> + !mmu_absolute_addr_valid(prefix + TARGET_PAGE_SIZE, true)) { >> + tcg_s390_program_interrupt(env, PGM_ADDRESSING, GETPC()); >> + } >> >> env->psa = prefix; >> HELPER_LOG("prefix: %#x\n", prefix); >> >> base-commit: 3a821c52e1a30ecd9a436f2c67cc66b5628c829f > >