From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: Re: [PATCH v3 13/17] target/loongarch: Use correct address when flush tlb
Date: Fri, 25 Jul 2025 15:45:10 -1000 [thread overview]
Message-ID: <c75d79ab-97b8-464b-9774-a51de03a8e31@linaro.org> (raw)
In-Reply-To: <20250725013739.994437-14-maobibo@loongson.cn>
On 7/24/25 15:37, Bibo Mao wrote:
> With tlb_flush_range_by_mmuidx(), the virtual address is 64 bit.
> However on LoongArch TLB emulation system, virtual address is
> 48 bit. It is necessary to convert 48 bit address to 64 bit when
> flush tlb, also fix address calculation issue with odd page.
>
> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
> ---
> target/loongarch/tcg/tlb_helper.c | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_helper.c
> index 715c5a20da..61cc19610e 100644
> --- a/target/loongarch/tcg/tlb_helper.c
> +++ b/target/loongarch/tcg/tlb_helper.c
> @@ -96,6 +96,15 @@ static void raise_mmu_exception(CPULoongArchState *env, target_ulong address,
> }
> }
>
> +/* Convert 48 bit virtual address from LoongArch TLB to 64 bit VA */
> +static inline target_ulong __vaddr(target_ulong addr)
> +{
> + target_ulong high;
> +
> + high = -(addr >> (TARGET_VIRT_ADDR_SPACE_BITS - 1));
> + return addr + (high << TARGET_VIRT_ADDR_SPACE_BITS);
> +}
Don't use __ symbols.
Also, this function is
sextract64(addr, 0, TARGET_VIRT_ADDR_SPACE_BITS - 1)
r~
next prev parent reply other threads:[~2025-07-26 1:45 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-25 1:37 [PATCH v3 00/17] target/loongarch: Enhancement about tcg mmu Bibo Mao
2025-07-25 1:37 ` [PATCH v3 01/17] target/loongarch: Move some function definition to kvm directory Bibo Mao
2025-07-25 23:37 ` Richard Henderson
2025-07-25 1:37 ` [PATCH v3 02/17] target/loongarch: Define function loongarch_cpu_post_init as static Bibo Mao
2025-07-25 23:38 ` Richard Henderson
2025-07-25 1:37 ` [PATCH v3 03/17] target/loongarch: Set page size in TLB misc with STLB Bibo Mao
2025-07-25 1:37 ` [PATCH v3 04/17] target/loongarch: Add header file cpu-mmu.h Bibo Mao
2025-07-26 1:10 ` Richard Henderson
2025-07-26 1:16 ` Richard Henderson
2025-07-28 3:08 ` Bibo Mao
2025-07-25 1:37 ` [PATCH v3 05/17] target/loongarch: Add common function loongarch_check_pte() Bibo Mao
2025-07-26 1:19 ` Richard Henderson
2025-07-28 3:15 ` Bibo Mao
2025-07-28 5:07 ` Richard Henderson
2025-07-25 1:37 ` [PATCH v3 06/17] target/loongarch: Use loongarch_check_pte() with page table walking Bibo Mao
2025-07-26 1:20 ` Richard Henderson
2025-07-25 1:37 ` [PATCH v3 07/17] target/loongarch: Add parameter mmu_context with loongarch_page_table_walker Bibo Mao
2025-07-26 1:31 ` Richard Henderson
2025-07-28 3:16 ` Bibo Mao
2025-07-25 1:37 ` [PATCH v3 08/17] target/loongarch: Add parameter mmu_context with loongarch_map_tlb_entry Bibo Mao
2025-07-25 1:37 ` [PATCH v3 09/17] target/loongarch: Add parameter mmu_context with loongarch_get_addr_from_tlb Bibo Mao
2025-07-25 1:37 ` [PATCH v3 10/17] target/loongarch: Add parameter mmu_context with loongarch_map_address Bibo Mao
2025-07-25 1:37 ` [PATCH v3 11/17] target/loongarch: Add parameter mmu_context with get_physical_address Bibo Mao
2025-07-25 1:37 ` [PATCH v3 12/17] target/loongarch: Track user mode address accessed in kernel mode Bibo Mao
2025-07-25 1:37 ` [PATCH v3 13/17] target/loongarch: Use correct address when flush tlb Bibo Mao
2025-07-26 1:45 ` Richard Henderson [this message]
2025-07-28 3:22 ` Bibo Mao
2025-07-28 5:09 ` Richard Henderson
2025-07-28 6:05 ` Bibo Mao
2025-07-25 1:37 ` [PATCH v3 14/17] target/loongarch: Use mmu idx bitmap method " Bibo Mao
2025-07-25 1:47 ` [PATCH v3 15/17] target/loongarch: Add parameter tlb pointer with fill_tlb_entry Bibo Mao
2025-07-26 1:47 ` Richard Henderson
2025-07-25 1:47 ` [PATCH v3 16/17] target/loongarch: Reduce TLB flush with helper_tlbwr Bibo Mao
2025-07-25 1:48 ` [PATCH v3 17/17] target/loongarch: Update TLB index selection method Bibo Mao
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