From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
bmeng@tinylab.org, liwei1518@gmail.com,
zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
ajones@ventanamicro.com
Subject: Re: [PATCH for-9.0 v2 4/8] target/riscv/cpu.c: add riscv_cpu_is_32bit()
Date: Tue, 28 Nov 2023 11:03:31 +0100 [thread overview]
Message-ID: <c772249f-e8e1-414f-b6e9-3bf224ff14a9@linaro.org> (raw)
In-Reply-To: <20231127113752.1290265-5-dbarboza@ventanamicro.com>
On 27/11/23 12:37, Daniel Henrique Barboza wrote:
> Next patch will need to retrieve if a given RISCVCPU is 32 or 64 bit.
> The existing helper riscv_is_32bit() (hw/riscv/boot.c) will always check
> the first CPU of a given hart array, not any given CPU.
>
> Create a helper to retrieve the info for any given CPU, not the first
> CPU of the hart array. The helper is using the same 32 bit check that
> riscv_cpu_satp_mode_finalize() was doing.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
> target/riscv/cpu.c | 7 ++++++-
> target/riscv/cpu.h | 1 +
> 2 files changed, 7 insertions(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
next prev parent reply other threads:[~2023-11-28 10:03 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-27 11:37 [PATCH for-9.0 v2 0/8] target/riscv: implement RVA22S64 profile Daniel Henrique Barboza
2023-11-27 11:37 ` [PATCH for-9.0 v2 1/8] target/riscv: implement svade Daniel Henrique Barboza
2023-11-27 11:37 ` [PATCH for-9.0 v2 2/8] target/riscv: add priv ver restriction to profiles Daniel Henrique Barboza
2023-11-27 12:13 ` Andrew Jones
2023-11-27 11:37 ` [PATCH for-9.0 v2 3/8] target/riscv/cpu.c: finalize satp_mode earlier Daniel Henrique Barboza
2023-11-27 11:37 ` [PATCH for-9.0 v2 4/8] target/riscv/cpu.c: add riscv_cpu_is_32bit() Daniel Henrique Barboza
2023-11-28 10:03 ` Philippe Mathieu-Daudé [this message]
2023-11-27 11:37 ` [PATCH for-9.0 v2 5/8] target/riscv: add satp_mode profile support Daniel Henrique Barboza
2023-11-27 11:37 ` [PATCH for-9.0 v2 6/8] target/riscv: add 'parent' in profile description Daniel Henrique Barboza
2023-11-27 12:22 ` Andrew Jones
2023-11-27 11:37 ` [PATCH for-9.0 v2 7/8] target/riscv: add RVA22S64 profile Daniel Henrique Barboza
2023-11-27 12:22 ` Andrew Jones
2023-11-27 11:37 ` [PATCH for-9.0 v2 8/8] target/riscv: add rva22s64 cpu Daniel Henrique Barboza
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=c772249f-e8e1-414f-b6e9-3bf224ff14a9@linaro.org \
--to=philmd@linaro.org \
--cc=ajones@ventanamicro.com \
--cc=alistair.francis@wdc.com \
--cc=bmeng@tinylab.org \
--cc=dbarboza@ventanamicro.com \
--cc=liwei1518@gmail.com \
--cc=palmer@rivosinc.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=zhiwei_liu@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).