From: Richard Henderson <richard.henderson@linaro.org>
To: Max Filippov <jcmvbkbc@gmail.com>, qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: Re: [PATCH 1/2] target/xtensa: use generic instruction breakpoint infrastructure
Date: Thu, 30 Nov 2023 12:12:29 -0600 [thread overview]
Message-ID: <c7f94264-7d05-4532-80c2-74b963134d49@linaro.org> (raw)
In-Reply-To: <20231130171920.3798954-2-jcmvbkbc@gmail.com>
On 11/30/23 11:19, Max Filippov wrote:
> Don't embed ibreak exception generation into TB and don't invalidate TB
> on ibreak address change. Add CPUBreakpoint pointers to xtensa
> CPUArchState, use cpu_breakpoint_insert/cpu_breakpoint_remove_by_ref to
> manage ibreak breakpoints and provide TCGCPUOps::debug_check_breakpoint
> callback that recognizes valid instruction breakpoints.
>
> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
> ---
> target/xtensa/cpu.c | 1 +
> target/xtensa/cpu.h | 4 ++++
> target/xtensa/dbg_helper.c | 46 +++++++++++++++++++++++++-------------
> target/xtensa/helper.c | 12 ++++++++++
> target/xtensa/translate.c | 17 --------------
> 5 files changed, 47 insertions(+), 33 deletions(-)
Thanks a bunch,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2023-11-30 18:13 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-30 17:19 [PATCH 0/2] target/xtensa: use generic instruction breakpoint infrastructure Max Filippov
2023-11-30 17:19 ` [PATCH 1/2] " Max Filippov
2023-11-30 18:12 ` Richard Henderson [this message]
2023-11-30 17:19 ` [PATCH 2/2] tests/tcg/xtensa: add icount/ibreak priority test Max Filippov
2023-11-30 18:20 ` Richard Henderson
2024-01-08 16:46 ` [PATCH 0/2] target/xtensa: use generic instruction breakpoint infrastructure Philippe Mathieu-Daudé
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