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* [PATCH 0/2] accel/tcg: Remove non-explicit endian cpu_ld*_code() wrappers
@ 2026-03-20  7:45 Philippe Mathieu-Daudé
  2026-03-20  7:45 ` [PATCH 1/2] target/mips: Inline cpu_ld{uw, l}_code() calls in set_badinstr_registers Philippe Mathieu-Daudé
  2026-03-20  7:45 ` [PATCH 2/2] accel/tcg: Remove non-explicit endian cpu_ld*_code() wrappers Philippe Mathieu-Daudé
  0 siblings, 2 replies; 5+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-03-20  7:45 UTC (permalink / raw)
  To: qemu-devel
  Cc: Pierrick Bouvier, Richard Henderson, Anton Johansson,
	Paolo Bonzini, Philippe Mathieu-Daudé

Inline the last non-explicit endian cpu_ld*_code() use
in the MIPS target then finally remove the legacy wrappers
(updating the documentation).

Philippe Mathieu-Daudé (2):
  target/mips: Inline cpu_ld{uw,l}_code() calls in
    set_badinstr_registers
  accel/tcg: Remove non-explicit endian cpu_ld*_code() wrappers

 docs/devel/loads-stores.rst         | 21 ++++++++----------
 include/accel/tcg/cpu-ldst.h        | 33 ++---------------------------
 target/mips/tcg/system/tlb_helper.c | 18 +++++++++++-----
 3 files changed, 24 insertions(+), 48 deletions(-)

-- 
2.53.0



^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 1/2] target/mips: Inline cpu_ld{uw, l}_code() calls in set_badinstr_registers
  2026-03-20  7:45 [PATCH 0/2] accel/tcg: Remove non-explicit endian cpu_ld*_code() wrappers Philippe Mathieu-Daudé
@ 2026-03-20  7:45 ` Philippe Mathieu-Daudé
  2026-03-26  3:09   ` [PATCH 1/2] target/mips: Inline cpu_ld{uw,l}_code() " Richard Henderson
  2026-03-20  7:45 ` [PATCH 2/2] accel/tcg: Remove non-explicit endian cpu_ld*_code() wrappers Philippe Mathieu-Daudé
  1 sibling, 1 reply; 5+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-03-20  7:45 UTC (permalink / raw)
  To: qemu-devel
  Cc: Pierrick Bouvier, Richard Henderson, Anton Johansson,
	Paolo Bonzini, Philippe Mathieu-Daudé, Aurelien Jarno,
	Jiaxun Yang, Aleksandar Rikalo

In preparation of removing the cpu_lduw_code() and cpu_ldl_code()
wrappers, inline them. Directly replace MO_TE by mo_endian_env(env).

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/mips/tcg/system/tlb_helper.c | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/target/mips/tcg/system/tlb_helper.c b/target/mips/tcg/system/tlb_helper.c
index 566924b079e..b989c7e5bd5 100644
--- a/target/mips/tcg/system/tlb_helper.c
+++ b/target/mips/tcg/system/tlb_helper.c
@@ -999,16 +999,22 @@ static void set_hflags_for_handler(CPUMIPSState *env)
 
 static inline void set_badinstr_registers(CPUMIPSState *env)
 {
+    CPUState *cs = env_cpu(env);
+    MemOpIdx oi;
+
     if (env->insn_flags & ISA_NANOMIPS32) {
         if (env->CP0_Config3 & (1 << CP0C3_BI)) {
-            uint32_t instr = (cpu_lduw_code(env, env->active_tc.PC)) << 16;
+            uint32_t instr;
+
+            oi = make_memop_idx(mo_endian_env(env) | MO_UW, cpu_mmu_index(cs, true));
+            instr =  cpu_ldw_code_mmu(env, env->active_tc.PC, oi, 0) << 16;
             if ((instr & 0x10000000) == 0) {
-                instr |= cpu_lduw_code(env, env->active_tc.PC + 2);
+                instr |= cpu_ldw_code_mmu(env, env->active_tc.PC + 2, oi, 0);
             }
             env->CP0_BadInstr = instr;
 
             if ((instr & 0xFC000000) == 0x60000000) {
-                instr = cpu_lduw_code(env, env->active_tc.PC + 4) << 16;
+                instr =  cpu_ldw_code_mmu(env, env->active_tc.PC + 4, oi, 0) << 16;
                 env->CP0_BadInstrX = instr;
             }
         }
@@ -1019,12 +1025,14 @@ static inline void set_badinstr_registers(CPUMIPSState *env)
         /* TODO: add BadInstr support for microMIPS */
         return;
     }
+
+    oi = make_memop_idx(mo_endian_env(env) | MO_UL, cpu_mmu_index(cs, true));
     if (env->CP0_Config3 & (1 << CP0C3_BI)) {
-        env->CP0_BadInstr = cpu_ldl_code(env, env->active_tc.PC);
+        env->CP0_BadInstr = cpu_ldl_code_mmu(env, env->active_tc.PC, oi, 0);
     }
     if ((env->CP0_Config3 & (1 << CP0C3_BP)) &&
         (env->hflags & MIPS_HFLAG_BMASK)) {
-        env->CP0_BadInstrP = cpu_ldl_code(env, env->active_tc.PC - 4);
+        env->CP0_BadInstrP = cpu_ldl_code_mmu(env, env->active_tc.PC - 4, oi, 0);
     }
 }
 
-- 
2.53.0



^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/2] accel/tcg: Remove non-explicit endian cpu_ld*_code() wrappers
  2026-03-20  7:45 [PATCH 0/2] accel/tcg: Remove non-explicit endian cpu_ld*_code() wrappers Philippe Mathieu-Daudé
  2026-03-20  7:45 ` [PATCH 1/2] target/mips: Inline cpu_ld{uw, l}_code() calls in set_badinstr_registers Philippe Mathieu-Daudé
@ 2026-03-20  7:45 ` Philippe Mathieu-Daudé
  2026-03-26  3:10   ` Richard Henderson
  1 sibling, 1 reply; 5+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-03-20  7:45 UTC (permalink / raw)
  To: qemu-devel
  Cc: Pierrick Bouvier, Richard Henderson, Anton Johansson,
	Paolo Bonzini, Philippe Mathieu-Daudé

All uses were converted to the cpu_ld*_code_mmu() helpers:
remove them. Update the documentation.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 docs/devel/loads-stores.rst  | 21 +++++++++------------
 include/accel/tcg/cpu-ldst.h | 33 ++-------------------------------
 2 files changed, 11 insertions(+), 43 deletions(-)

diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst
index 57892e814cd..c719241a7f5 100644
--- a/docs/devel/loads-stores.rst
+++ b/docs/devel/loads-stores.rst
@@ -235,16 +235,13 @@ Regexes for git grep:
  - ``\<cpu_ld[us]\?[bwlq]\(_[bl]e\)\?_data\>``
  - ``\<cpu_st[bwlq]\(_[bl]e\)\?_data\+\>``
 
-``cpu_ld*_code``
-~~~~~~~~~~~~~~~~
+``cpu_ld*_code_mmu``
+~~~~~~~~~~~~~~~~~~~~
 
-These functions perform a read for instruction execution.  The ``mmuidx``
-parameter is taken from the current mode of the guest CPU, as determined
-by ``cpu_mmu_index(env, true)``.  The ``retaddr`` parameter is 0, and
-thus does not unwind guest CPU state, because CPU state is always
-synchronized while translating instructions.  Any guest CPU exception
-that is raised will indicate an instruction execution fault rather than
-a data read fault.
+These functions work like the ``cpu_{ld,st}*_mmu`` functions
+except that they perform a read for instruction execution.
+Any guest CPU exception that is raised will indicate an instruction
+execution fault rather than a data read fault.
 
 In general these functions should not be used directly during translation.
 There are wrapper functions that are to be used which also take care of
@@ -252,7 +249,7 @@ plugins for tracing.
 
 Function names follow the pattern:
 
-load: ``cpu_ld{sign}{size}_code(env, ptr)``
+load: ``cpu_ld{sign}{size}_code_mmu(env, addr, oi, retaddr)``
 
 ``sign``
  - (empty) : for 32 or 64 bit sizes
@@ -266,12 +263,12 @@ load: ``cpu_ld{sign}{size}_code(env, ptr)``
  - ``q`` : 64 bits
 
 Regexes for git grep:
- - ``\<cpu_ld[us]\?[bwlq]_code\>``
+ - ``\<cpu_ld[us]\?[bwlq]_code_mmu\>``
 
 ``translator_ld*``
 ~~~~~~~~~~~~~~~~~~
 
-These functions are a wrapper for ``cpu_ld*_code`` which also perform
+These functions are a wrapper for ``cpu_ld*_code_mmu`` which also perform
 any actions required by any tracing plugins.  They are only to be
 called during the translator callback ``translate_insn``.
 
diff --git a/include/accel/tcg/cpu-ldst.h b/include/accel/tcg/cpu-ldst.h
index a5711bc15a6..084d906a56b 100644
--- a/include/accel/tcg/cpu-ldst.h
+++ b/include/accel/tcg/cpu-ldst.h
@@ -51,10 +51,9 @@
  *     _be: for forced big endian
  *     _le: for forced little endian
  *
- * mmusuffix is one of the generic suffixes "data" or "code", or "mmuidx".
+ * mmusuffix is one of the generic suffixes "data" or "mmuidx".
  * The "mmuidx" suffix carries an extra mmu_idx argument that specifies
- * the index to use; the "data" and "code" suffixes take the index from
- * cpu_mmu_index().
+ * the index to use; the "data" suffix take the index from cpu_mmu_index().
  *
  * The "mmu" suffix carries the full MemOpIdx, with both mmu_idx and the
  * MemOp including alignment requirements.  The alignment will be enforced.
@@ -474,34 +473,6 @@ cpu_stq_le_data(CPUArchState *env, abi_ptr addr, uint64_t val)
 # define cpu_stl_mmuidx_ra    cpu_stl_le_mmuidx_ra
 # define cpu_stq_mmuidx_ra    cpu_stq_le_mmuidx_ra
 #endif
-
-static inline uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr)
-{
-    CPUState *cs = env_cpu(env);
-    MemOpIdx oi = make_memop_idx(MO_UB, cpu_mmu_index(cs, true));
-    return cpu_ldb_code_mmu(env, addr, oi, 0);
-}
-
-static inline uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr)
-{
-    CPUState *cs = env_cpu(env);
-    MemOpIdx oi = make_memop_idx(MO_TEUW, cpu_mmu_index(cs, true));
-    return cpu_ldw_code_mmu(env, addr, oi, 0);
-}
-
-static inline uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr)
-{
-    CPUState *cs = env_cpu(env);
-    MemOpIdx oi = make_memop_idx(MO_TEUL, cpu_mmu_index(cs, true));
-    return cpu_ldl_code_mmu(env, addr, oi, 0);
-}
-
-static inline uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
-{
-    CPUState *cs = env_cpu(env);
-    MemOpIdx oi = make_memop_idx(MO_TEUQ, cpu_mmu_index(cs, true));
-    return cpu_ldq_code_mmu(env, addr, oi, 0);
-}
 #endif /* TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API */
 
 #endif /* ACCEL_TCG_CPU_LDST_H */
-- 
2.53.0



^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/2] target/mips: Inline cpu_ld{uw,l}_code() calls in set_badinstr_registers
  2026-03-20  7:45 ` [PATCH 1/2] target/mips: Inline cpu_ld{uw, l}_code() calls in set_badinstr_registers Philippe Mathieu-Daudé
@ 2026-03-26  3:09   ` Richard Henderson
  0 siblings, 0 replies; 5+ messages in thread
From: Richard Henderson @ 2026-03-26  3:09 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-devel
  Cc: Pierrick Bouvier, Anton Johansson, Paolo Bonzini, Aurelien Jarno,
	Jiaxun Yang, Aleksandar Rikalo

On 3/20/26 17:45, Philippe Mathieu-Daudé wrote:
> In preparation of removing the cpu_lduw_code() and cpu_ldl_code()
> wrappers, inline them. Directly replace MO_TE by mo_endian_env(env).
> 
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
>   target/mips/tcg/system/tlb_helper.c | 18 +++++++++++++-----
>   1 file changed, 13 insertions(+), 5 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] accel/tcg: Remove non-explicit endian cpu_ld*_code() wrappers
  2026-03-20  7:45 ` [PATCH 2/2] accel/tcg: Remove non-explicit endian cpu_ld*_code() wrappers Philippe Mathieu-Daudé
@ 2026-03-26  3:10   ` Richard Henderson
  0 siblings, 0 replies; 5+ messages in thread
From: Richard Henderson @ 2026-03-26  3:10 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-devel
  Cc: Pierrick Bouvier, Anton Johansson, Paolo Bonzini

On 3/20/26 17:45, Philippe Mathieu-Daudé wrote:
> All uses were converted to the cpu_ld*_code_mmu() helpers:
> remove them. Update the documentation.
> 
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
>   docs/devel/loads-stores.rst  | 21 +++++++++------------
>   include/accel/tcg/cpu-ldst.h | 33 ++-------------------------------
>   2 files changed, 11 insertions(+), 43 deletions(-)



Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


^ permalink raw reply	[flat|nested] 5+ messages in thread

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2026-03-20  7:45 ` [PATCH 1/2] target/mips: Inline cpu_ld{uw, l}_code() calls in set_badinstr_registers Philippe Mathieu-Daudé
2026-03-26  3:09   ` [PATCH 1/2] target/mips: Inline cpu_ld{uw,l}_code() " Richard Henderson
2026-03-20  7:45 ` [PATCH 2/2] accel/tcg: Remove non-explicit endian cpu_ld*_code() wrappers Philippe Mathieu-Daudé
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