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[83.11.0.31]) by smtp.gmail.com with ESMTPSA id ij6-20020a056402158600b005705bfeeb27sm5514568edb.66.2024.04.22.06.38.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 22 Apr 2024 06:38:51 -0700 (PDT) Message-ID: Date: Mon, 22 Apr 2024 15:38:50 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/3] target/arm: Make the counter frequency default 1GHz for new CPUs, machines To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Leif Lindholm , Radoslaw Biernacki References: <20240419184608.2675213-1-peter.maydell@linaro.org> From: Marcin Juszkiewicz Content-Language: pl-PL, en-GB, en-HK Organization: Linaro In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::52f; envelope-from=marcin.juszkiewicz@linaro.org; helo=mail-ed1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org W dniu 22.04.2024 o 14:56, Peter Maydell pisze: > On Fri, 19 Apr 2024 at 19:46, Peter Maydell wrote: >> The upshot is that the only CPU type that changes is 'max'; but any >> new type we add in future (whether v8.6 or not) will also get the new >> 1GHz default (assuming we spot in code review any attempts to set >> the ARM_FEATURE_BACKCOMPAT_CNTFRQ flag on new CPU types as a result >> of cut-n-paste from an older CPU initfn ;-)). >> >> It remains the case that the machine model can override the default >> value via the 'cntfrq' QOM property (regardless of the CPU type). > > This patchset turns out to break the sbsa-ref board: the > Aarch64SbsarefMachine.test_sbsaref_alpine_linux_max_pauth_impdef > avocado test both (a) takes rather longer to boot and (b) when > running thinks that time is advancing very fast. > > I suspect this may be because the firmware hard-codes the > generic timer clock frequency it is expecting. I've cc'd the > sbsa-ref maintainers: is that correct? > > If so, we can deal with it by making the sbsa-ref board set the > cntfrq QOM property on its CPUs to force them to the old > frequency. However this will produce a technically-out-of-spec > CPU when used with a v8.6-compliant CPU type, so probably we > should do something to be able to tell the firmware the clock > frequency (if it doesn't want to just read CNTFRQ_EL0 itself). From what I see in EDK2 code we read CNTFREQ_EL0: GetPlatformTimerFreq() checks for PcdArmArchTimerFreqInHz variable which sbsa-ref has set to 0. So it calls ArmGenericTimerGetTimerFreq() -> ArmReadCntFrq() -> "mrs x0, cntfrq_el0" I added debug output to firmware and it shows me: HRW: GetPlatformTimerFreq TimerFreq = 62500000 Local tree: ed0604e99c (HEAD -> test-counter) target/arm: Default to 1GHz cntfrq for 'max' and new CPUs c0a8c341f5 target/arm: Refactor default generic timer frequency handling 592c01312b hw: Add compat machines for 9.1 62dbe54c24 (tag: v9.0.0-rc4, origin/master, origin/HEAD) Update version for v9.0.0-rc4 release a12214d1c4 (origin/staging) usb-storage: Fix BlockConf defaults sbsa-ref with "-cpu max" used. All cpu cores give me same value.