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From: Richard Henderson <richard.henderson@linaro.org>
To: Lucas Amaral <lucaaamaral@gmail.com>, qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, agraf@csgraf.de, peter.maydell@linaro.org,
	mohamed@unpredictable.fr, alex.bennee@linaro.org
Subject: Re: [PATCH v5 1/6] target/arm/emulate: add ISV=0 emulation library with load/store immediate
Date: Thu, 26 Mar 2026 12:39:50 +1000	[thread overview]
Message-ID: <c85ef3e0-d3c8-401f-b425-95a42bac17ef@linaro.org> (raw)
In-Reply-To: <20260317174740.31674-2-lucaaamaral@gmail.com>

On 3/18/26 03:47, Lucas Amaral wrote:
> +/* Memory access wrappers */
> +
> +static int mem_read(DisasContext *ctx, uint64_t va, void *buf, int size)
> +{
> +    if (((va & ~TARGET_PAGE_MASK) + size) > TARGET_PAGE_SIZE) {
> +        ctx->result = ARM_EMUL_ERR_MEM;
> +        return -1;
> +    }
> +    int ret = cpu_memory_rw_debug(ctx->cpu, va, buf, size, false);
> +    if (ret != 0) {
> +        ctx->result = ARM_EMUL_ERR_MEM;
> +    }
> +    return ret;
> +}

This is not implementing access for a debugger, but emulating an insn.
Thus *_debug is the wrong interface to use.

There is no direct interface for you to use here, because the ones we have at present will 
raise an exception and jump back to an emulation loop that doesn't exist here.  You'd need 
to translate the virtual address manually, recognize any exception raised, perform the 
access to the physical address, and recognize any hw exception raised.

> +/* Sign/zero extension helpers */
> +
> +static uint64_t sign_extend(uint64_t val, int from_bits)
> +{
> +    int shift = 64 - from_bits;
> +    return (int64_t)(val << shift) >> shift;
> +}

This is sextract64.

> +/* PRFM, DC cache maintenance -- treated as NOP */
> +static bool trans_NOP(DisasContext *ctx, arg_NOP *a)
> +{
> +    (void)ctx;
> +    (void)a;
> +    return true;
> +}

You don't need the (void) expressions.


r~


  reply	other threads:[~2026-03-26  2:40 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-17 17:47 [PATCH v5 0/6] target/arm: ISV=0 data abort emulation library Lucas Amaral
2026-03-17 17:47 ` [PATCH v5 1/6] target/arm/emulate: add ISV=0 emulation library with load/store immediate Lucas Amaral
2026-03-26  2:39   ` Richard Henderson [this message]
2026-03-17 17:47 ` [PATCH v5 2/6] target/arm/emulate: add load/store register offset Lucas Amaral
2026-03-17 17:47 ` [PATCH v5 3/6] target/arm/emulate: add load/store pair Lucas Amaral
2026-03-26  2:59   ` Richard Henderson
2026-03-17 17:47 ` [PATCH v5 4/6] target/arm/emulate: add load/store exclusive Lucas Amaral
2026-03-17 17:47 ` [PATCH v5 5/6] target/arm/emulate: add atomic, compare-and-swap, and PAC load Lucas Amaral
2026-03-17 17:47 ` [PATCH v5 6/6] target/arm/hvf, whpx: wire ISV=0 emulation for data aborts Lucas Amaral

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