From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Richard Henderson <richard.henderson@linaro.org>,
QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PULL 00/35] tcg patch queue
Date: Tue, 21 Sep 2021 11:41:55 +0200 [thread overview]
Message-ID: <c89c508e-bfe7-ad2e-b974-373e1e8e66a6@amsat.org> (raw)
In-Reply-To: <CAFEAcA-+pwETXYtSawvCRjLk2qio8PdEhnhW4yFhF85VvijVeQ@mail.gmail.com>
On 9/21/21 11:28, Peter Maydell wrote:
> On Mon, 20 Sept 2021 at 22:16, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>> Forget this crap. The missing piece was:
>>
>> -- >8 --
>> diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
>> index 0d5adccf1a7..da348938407 100644
>> --- a/target/arm/cpu_tcg.c
>> +++ b/target/arm/cpu_tcg.c
>> @@ -23,6 +23,11 @@
>> #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
>>
>> #if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
>> +static bool arm_v7m_cpu_has_work(CPUState *cs)
>> +{
>> + return cs->interrupt_request & CPU_INTERRUPT_HARD;
>> +}
>
> Is this really all that's needed ? I would have expected
> at least a check on the power_state.
I started reading the PSCI spec this morning and you are right,
it doesn't seem restricted to A/R profiles, M profiles also have
it.
next prev parent reply other threads:[~2021-09-21 9:45 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-16 15:29 [PULL 00/35] tcg patch queue Richard Henderson
2021-09-16 15:29 ` [PULL 01/35] include/exec: Move cpu_signal_handler declaration Richard Henderson
2021-09-16 15:29 ` [PULL 02/35] accel/tcg: Restrict cpu_handle_halt() to sysemu Richard Henderson
2021-09-16 15:29 ` [PULL 03/35] hw/core: Restrict cpu_has_work() " Richard Henderson
2021-09-16 15:29 ` [PULL 04/35] hw/core: Un-inline cpu_has_work() Richard Henderson
2021-09-16 15:29 ` [PULL 05/35] sysemu: Introduce AccelOpsClass::has_work() Richard Henderson
2021-09-16 15:29 ` [PULL 06/35] accel/kvm: Implement AccelOpsClass::has_work() Richard Henderson
2021-09-16 15:29 ` [PULL 07/35] accel/whpx: " Richard Henderson
2021-09-16 15:29 ` [PULL 08/35] accel/tcg: Implement AccelOpsClass::has_work() as stub Richard Henderson
2021-09-16 15:29 ` [PULL 09/35] target/alpha: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 10/35] target/arm: Restrict has_work() handler to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 11/35] target/avr: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 12/35] target/cris: " Richard Henderson
2021-09-16 15:30 ` [PULL 13/35] target/hexagon: Remove unused has_work() handler Richard Henderson
2021-09-16 15:30 ` [PULL 14/35] target/hppa: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 15/35] target/i386: Restrict has_work() handler to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 16/35] target/m68k: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 17/35] target/microblaze: " Richard Henderson
2021-09-16 15:30 ` [PULL 18/35] target/mips: Restrict has_work() handler to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 19/35] target/nios2: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 20/35] target/openrisc: " Richard Henderson
2021-09-16 15:30 ` [PULL 21/35] target/ppc: Introduce PowerPCCPUClass::has_work() Richard Henderson
2021-09-16 15:30 ` [PULL 22/35] target/ppc: Restrict has_work() handlers to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 23/35] target/riscv: Restrict has_work() handler " Richard Henderson
2021-09-16 15:30 ` [PULL 24/35] target/rx: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 25/35] target/s390x: Restrict has_work() handler to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 26/35] target/sh4: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 27/35] target/sparc: Remove pointless use of CONFIG_TCG definition Richard Henderson
2021-09-16 15:30 ` [PULL 28/35] target/sparc: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 29/35] target/tricore: " Richard Henderson
2021-09-16 15:30 ` [PULL 30/35] target/xtensa: " Richard Henderson
2021-09-16 15:30 ` [PULL 31/35] accel: Add missing AccelOpsClass::has_work() and drop SysemuCPUOps one Richard Henderson
2021-09-16 15:30 ` [PULL 32/35] tcg/mips: Drop inline markers Richard Henderson
2021-09-16 15:30 ` [PULL 33/35] tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr Richard Henderson
2021-09-16 15:30 ` [PULL 34/35] tcg/mips: Unset TCG_TARGET_HAS_direct_jump Richard Henderson
2021-09-16 15:30 ` [PULL 35/35] tcg/mips: Drop special alignment for code_gen_buffer Richard Henderson
2021-09-20 10:07 ` [PULL 00/35] tcg patch queue Peter Maydell
2021-09-20 12:51 ` Philippe Mathieu-Daudé
2021-09-20 13:14 ` Philippe Mathieu-Daudé
2021-09-20 13:52 ` Philippe Mathieu-Daudé
2021-09-20 21:16 ` Philippe Mathieu-Daudé
2021-09-21 9:28 ` Peter Maydell
2021-09-21 9:41 ` Philippe Mathieu-Daudé [this message]
2021-09-21 9:47 ` Peter Maydell
2021-09-20 13:19 ` Richard Henderson
2021-09-21 15:25 ` Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2023-11-07 2:48 [PATCH " Richard Henderson
2023-11-07 2:55 ` [PULL " Richard Henderson
2023-11-07 3:06 ` Stefan Hajnoczi
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