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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>,
	Paolo Bonzini <pbonzini@redhat.com>
Cc: qemu-devel@nongnu.org, "Alex Bennée" <alex.bennee@linaro.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"David Hildenbrand" <david@redhat.com>,
	"Bharat Bhushan" <bbhushan2@marvell.com>
Subject: Re: [PULL 034/126] softmmu: Extract watchpoint API from physmem.c
Date: Thu, 23 Mar 2023 09:54:26 +0100	[thread overview]
Message-ID: <c8c3c74f-53e6-6b3f-756f-b9c2eaa389a0@linaro.org> (raw)
In-Reply-To: <20230227140213.35084-25-philmd@linaro.org>

On 27/2/23 15:00, Philippe Mathieu-Daudé wrote:
> The watchpoint API is specific to TCG system emulation.

I'm seeing CPUWatchpoint being used by KVM:

$ git grep CPUWatchpoint|fgrep kvm
target/arm/kvm64.c:1558:        CPUWatchpoint *wp = 
find_hw_watchpoint(cs, debug_exit->far);
target/i386/kvm/kvm.c:5216:static CPUWatchpoint hw_watchpoint;
target/ppc/kvm.c:443:static CPUWatchpoint hw_watchpoint;
target/s390x/kvm/kvm.c:139:static CPUWatchpoint hw_watchpoint;

Scrolling a bit in git-history:

commit e4482ab7e3849fb5e01ccacfc13f424cc6acb8d5
Author: Alex Bennée <alex.bennee@linaro.org>
Date:   Thu Dec 17 13:37:15 2015 +0000

     target-arm: kvm - add support for HW assisted debug

     This adds basic support for HW assisted debug. The ioctl interface
     to KVM allows us to pass an implementation defined number of break
     and watch point registers. When KVM_GUESTDBG_USE_HW is specified
     these debug registers will be installed in place on the world switch
     into the guest.

So it seems I missed something big.

> Move it to a new compile unit. The inlined stubs are used
> for user-mode and non-TCG accelerators.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> Message-Id: <20221209141254.68662-1-philmd@linaro.org>
> ---
>   MAINTAINERS           |   1 +
>   include/hw/core/cpu.h |   2 +-
>   softmmu/meson.build   |   3 +-
>   softmmu/physmem.c     | 191 ------------------------------------
>   softmmu/watchpoint.c  | 220 ++++++++++++++++++++++++++++++++++++++++++
>   5 files changed, 224 insertions(+), 193 deletions(-)
>   create mode 100644 softmmu/watchpoint.c
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 6f1d230027..75dccf0b4e 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -123,6 +123,7 @@ M: Richard Henderson <richard.henderson@linaro.org>
>   R: Paolo Bonzini <pbonzini@redhat.com>
>   S: Maintained
>   F: softmmu/cpus.c
> +F: softmmu/watchpoint.c
>   F: cpus-common.c
>   F: page-vary.c
>   F: page-vary-common.c
> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
> index 56cbe9e678..a5aa44d12c 100644
> --- a/include/hw/core/cpu.h
> +++ b/include/hw/core/cpu.h
> @@ -948,7 +948,7 @@ static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask)
>       return false;
>   }
>   
> -#ifdef CONFIG_USER_ONLY
> +#if !defined(CONFIG_TCG) || defined(CONFIG_USER_ONLY)

Should I partially revert this?

>   static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
>                                           int flags, CPUWatchpoint **watchpoint)
>   {
> diff --git a/softmmu/meson.build b/softmmu/meson.build
> index 1828db149c..0180577517 100644
> --- a/softmmu/meson.build
> +++ b/softmmu/meson.build
> @@ -8,7 +8,8 @@ specific_ss.add(when: 'CONFIG_SOFTMMU', if_true: [files(
>   )])
>   
>   specific_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: [files(
> -  'icount.c'
> +  'icount.c',
> +  'watchpoint.c',
>   )])
>   
>   softmmu_ss.add(files(
> diff --git a/softmmu/physmem.c b/softmmu/physmem.c
> index cb998cdf23..df54b917a9 100644
> --- a/softmmu/physmem.c
> +++ b/softmmu/physmem.c
> @@ -781,197 +781,6 @@ AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx)
>       return cpu->cpu_ases[asidx].as;
>   }
>   
> -/* Add a watchpoint.  */
> -int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
> -                          int flags, CPUWatchpoint **watchpoint)
> -{
> -    CPUWatchpoint *wp;
> -    vaddr in_page;
> -
> -    /* forbid ranges which are empty or run off the end of the address space */
> -    if (len == 0 || (addr + len - 1) < addr) {
> -        error_report("tried to set invalid watchpoint at %"
> -                     VADDR_PRIx ", len=%" VADDR_PRIu, addr, len);
> -        return -EINVAL;
> -    }
> -    wp = g_malloc(sizeof(*wp));
> -
> -    wp->vaddr = addr;
> -    wp->len = len;
> -    wp->flags = flags;
> -
> -    /* keep all GDB-injected watchpoints in front */
> -    if (flags & BP_GDB) {
> -        QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry);
> -    } else {
> -        QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry);
> -    }
> -
> -    in_page = -(addr | TARGET_PAGE_MASK);
> -    if (len <= in_page) {
> -        tlb_flush_page(cpu, addr);
> -    } else {
> -        tlb_flush(cpu);
> -    }
> -
> -    if (watchpoint)
> -        *watchpoint = wp;
> -    return 0;
> -}
> -
> -/* Remove a specific watchpoint.  */
> -int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
> -                          int flags)
> -{
> -    CPUWatchpoint *wp;
> -
> -    QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
> -        if (addr == wp->vaddr && len == wp->len
> -                && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {
> -            cpu_watchpoint_remove_by_ref(cpu, wp);
> -            return 0;
> -        }
> -    }
> -    return -ENOENT;
> -}
> -
> -/* Remove a specific watchpoint by reference.  */
> -void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
> -{
> -    QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry);
> -
> -    tlb_flush_page(cpu, watchpoint->vaddr);
> -
> -    g_free(watchpoint);
> -}
> -
> -/* Remove all matching watchpoints.  */
> -void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
> -{
> -    CPUWatchpoint *wp, *next;
> -
> -    QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) {
> -        if (wp->flags & mask) {
> -            cpu_watchpoint_remove_by_ref(cpu, wp);
> -        }
> -    }
> -}
> -
> -#ifdef CONFIG_TCG
> -/* Return true if this watchpoint address matches the specified
> - * access (ie the address range covered by the watchpoint overlaps
> - * partially or completely with the address range covered by the
> - * access).
> - */
> -static inline bool watchpoint_address_matches(CPUWatchpoint *wp,
> -                                              vaddr addr, vaddr len)
> -{
> -    /* We know the lengths are non-zero, but a little caution is
> -     * required to avoid errors in the case where the range ends
> -     * exactly at the top of the address space and so addr + len
> -     * wraps round to zero.
> -     */
> -    vaddr wpend = wp->vaddr + wp->len - 1;
> -    vaddr addrend = addr + len - 1;
> -
> -    return !(addr > wpend || wp->vaddr > addrend);
> -}
> -
> -/* Return flags for watchpoints that match addr + prot.  */
> -int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len)
> -{
> -    CPUWatchpoint *wp;
> -    int ret = 0;
> -
> -    QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
> -        if (watchpoint_address_matches(wp, addr, len)) {
> -            ret |= wp->flags;
> -        }
> -    }
> -    return ret;
> -}
> -
> -/* Generate a debug exception if a watchpoint has been hit.  */
> -void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
> -                          MemTxAttrs attrs, int flags, uintptr_t ra)
> -{
> -    CPUClass *cc = CPU_GET_CLASS(cpu);
> -    CPUWatchpoint *wp;
> -
> -    assert(tcg_enabled());
> -    if (cpu->watchpoint_hit) {
> -        /*
> -         * We re-entered the check after replacing the TB.
> -         * Now raise the debug interrupt so that it will
> -         * trigger after the current instruction.
> -         */
> -        qemu_mutex_lock_iothread();
> -        cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
> -        qemu_mutex_unlock_iothread();
> -        return;
> -    }
> -
> -    if (cc->tcg_ops->adjust_watchpoint_address) {
> -        /* this is currently used only by ARM BE32 */
> -        addr = cc->tcg_ops->adjust_watchpoint_address(cpu, addr, len);
> -    }
> -    QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
> -        if (watchpoint_address_matches(wp, addr, len)
> -            && (wp->flags & flags)) {
> -            if (replay_running_debug()) {
> -                /*
> -                 * replay_breakpoint reads icount.
> -                 * Force recompile to succeed, because icount may
> -                 * be read only at the end of the block.
> -                 */
> -                if (!cpu->can_do_io) {
> -                    /* Force execution of one insn next time.  */
> -                    cpu->cflags_next_tb = 1 | CF_LAST_IO | CF_NOIRQ | curr_cflags(cpu);
> -                    cpu_loop_exit_restore(cpu, ra);
> -                }
> -                /*
> -                 * Don't process the watchpoints when we are
> -                 * in a reverse debugging operation.
> -                 */
> -                replay_breakpoint();
> -                return;
> -            }
> -            if (flags == BP_MEM_READ) {
> -                wp->flags |= BP_WATCHPOINT_HIT_READ;
> -            } else {
> -                wp->flags |= BP_WATCHPOINT_HIT_WRITE;
> -            }
> -            wp->hitaddr = MAX(addr, wp->vaddr);
> -            wp->hitattrs = attrs;
> -
> -            if (wp->flags & BP_CPU && cc->tcg_ops->debug_check_watchpoint &&
> -                !cc->tcg_ops->debug_check_watchpoint(cpu, wp)) {
> -                wp->flags &= ~BP_WATCHPOINT_HIT;
> -                continue;
> -            }
> -            cpu->watchpoint_hit = wp;
> -
> -            mmap_lock();
> -            /* This call also restores vCPU state */
> -            tb_check_watchpoint(cpu, ra);
> -            if (wp->flags & BP_STOP_BEFORE_ACCESS) {
> -                cpu->exception_index = EXCP_DEBUG;
> -                mmap_unlock();
> -                cpu_loop_exit(cpu);
> -            } else {
> -                /* Force execution of one insn next time.  */
> -                cpu->cflags_next_tb = 1 | CF_LAST_IO | CF_NOIRQ | curr_cflags(cpu);
> -                mmap_unlock();
> -                cpu_loop_exit_noexc(cpu);
> -            }
> -        } else {
> -            wp->flags &= ~BP_WATCHPOINT_HIT;
> -        }
> -    }
> -}
> -
> -#endif /* CONFIG_TCG */
> -
>   /* Called from RCU critical section */
>   static RAMBlock *qemu_get_ram_block(ram_addr_t addr)
>   {
> diff --git a/softmmu/watchpoint.c b/softmmu/watchpoint.c
> new file mode 100644
> index 0000000000..279129dd1c
> --- /dev/null
> +++ b/softmmu/watchpoint.c
> @@ -0,0 +1,220 @@
> +/*
> + * CPU watchpoints
> + *
> + *  Copyright (c) 2003 Fabrice Bellard
> + *
> + * This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * License as published by the Free Software Foundation; either
> + * version 2.1 of the License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> + * Lesser General Public License for more details.
> + *
> + * You should have received a copy of the GNU Lesser General Public
> + * License along with this library; if not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qemu/main-loop.h"
> +#include "exec/exec-all.h"
> +#include "exec/translate-all.h"
> +#include "sysemu/tcg.h"
> +#include "sysemu/replay.h"
> +#include "hw/core/tcg-cpu-ops.h"
> +#include "hw/core/cpu.h"
> +
> +/* Add a watchpoint.  */
> +int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
> +                          int flags, CPUWatchpoint **watchpoint)
> +{
> +    CPUWatchpoint *wp;
> +    vaddr in_page;
> +
> +    /* forbid ranges which are empty or run off the end of the address space */
> +    if (len == 0 || (addr + len - 1) < addr) {
> +        error_report("tried to set invalid watchpoint at %"
> +                     VADDR_PRIx ", len=%" VADDR_PRIu, addr, len);
> +        return -EINVAL;
> +    }
> +    wp = g_malloc(sizeof(*wp));
> +
> +    wp->vaddr = addr;
> +    wp->len = len;
> +    wp->flags = flags;
> +
> +    /* keep all GDB-injected watchpoints in front */
> +    if (flags & BP_GDB) {
> +        QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry);
> +    } else {
> +        QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry);
> +    }
> +
> +    in_page = -(addr | TARGET_PAGE_MASK);
> +    if (len <= in_page) {
> +        tlb_flush_page(cpu, addr);
> +    } else {
> +        tlb_flush(cpu);
> +    }
> +
> +    if (watchpoint) {
> +        *watchpoint = wp;
> +    }
> +    return 0;
> +}
> +
> +/* Remove a specific watchpoint.  */
> +int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
> +                          int flags)
> +{
> +    CPUWatchpoint *wp;
> +
> +    QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
> +        if (addr == wp->vaddr && len == wp->len
> +                && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {
> +            cpu_watchpoint_remove_by_ref(cpu, wp);
> +            return 0;
> +        }
> +    }
> +    return -ENOENT;
> +}
> +
> +/* Remove a specific watchpoint by reference.  */
> +void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
> +{
> +    QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry);
> +
> +    tlb_flush_page(cpu, watchpoint->vaddr);
> +
> +    g_free(watchpoint);
> +}
> +
> +/* Remove all matching watchpoints.  */
> +void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
> +{
> +    CPUWatchpoint *wp, *next;
> +
> +    QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) {
> +        if (wp->flags & mask) {
> +            cpu_watchpoint_remove_by_ref(cpu, wp);
> +        }
> +    }
> +}
> +
> +/*
> + * Return true if this watchpoint address matches the specified
> + * access (ie the address range covered by the watchpoint overlaps
> + * partially or completely with the address range covered by the
> + * access).
> + */
> +static inline bool watchpoint_address_matches(CPUWatchpoint *wp,
> +                                              vaddr addr, vaddr len)
> +{
> +    /*
> +     * We know the lengths are non-zero, but a little caution is
> +     * required to avoid errors in the case where the range ends
> +     * exactly at the top of the address space and so addr + len
> +     * wraps round to zero.
> +     */
> +    vaddr wpend = wp->vaddr + wp->len - 1;
> +    vaddr addrend = addr + len - 1;
> +
> +    return !(addr > wpend || wp->vaddr > addrend);
> +}
> +
> +/* Return flags for watchpoints that match addr + prot.  */
> +int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len)
> +{
> +    CPUWatchpoint *wp;
> +    int ret = 0;
> +
> +    QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
> +        if (watchpoint_address_matches(wp, addr, len)) {
> +            ret |= wp->flags;
> +        }
> +    }
> +    return ret;
> +}
> +
> +/* Generate a debug exception if a watchpoint has been hit.  */
> +void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
> +                          MemTxAttrs attrs, int flags, uintptr_t ra)
> +{
> +    CPUClass *cc = CPU_GET_CLASS(cpu);
> +    CPUWatchpoint *wp;
> +
> +    assert(tcg_enabled());
> +    if (cpu->watchpoint_hit) {
> +        /*
> +         * We re-entered the check after replacing the TB.
> +         * Now raise the debug interrupt so that it will
> +         * trigger after the current instruction.
> +         */
> +        qemu_mutex_lock_iothread();
> +        cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
> +        qemu_mutex_unlock_iothread();
> +        return;
> +    }
> +
> +    if (cc->tcg_ops->adjust_watchpoint_address) {
> +        /* this is currently used only by ARM BE32 */
> +        addr = cc->tcg_ops->adjust_watchpoint_address(cpu, addr, len);
> +    }
> +    QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
> +        if (watchpoint_address_matches(wp, addr, len)
> +            && (wp->flags & flags)) {
> +            if (replay_running_debug()) {
> +                /*
> +                 * replay_breakpoint reads icount.
> +                 * Force recompile to succeed, because icount may
> +                 * be read only at the end of the block.
> +                 */
> +                if (!cpu->can_do_io) {
> +                    /* Force execution of one insn next time.  */
> +                    cpu->cflags_next_tb = 1 | CF_LAST_IO | CF_NOIRQ
> +                                          | curr_cflags(cpu);
> +                    cpu_loop_exit_restore(cpu, ra);
> +                }
> +                /*
> +                 * Don't process the watchpoints when we are
> +                 * in a reverse debugging operation.
> +                 */
> +                replay_breakpoint();
> +                return;
> +            }
> +            if (flags == BP_MEM_READ) {
> +                wp->flags |= BP_WATCHPOINT_HIT_READ;
> +            } else {
> +                wp->flags |= BP_WATCHPOINT_HIT_WRITE;
> +            }
> +            wp->hitaddr = MAX(addr, wp->vaddr);
> +            wp->hitattrs = attrs;
> +
> +            if (wp->flags & BP_CPU && cc->tcg_ops->debug_check_watchpoint &&
> +                !cc->tcg_ops->debug_check_watchpoint(cpu, wp)) {
> +                wp->flags &= ~BP_WATCHPOINT_HIT;
> +                continue;
> +            }
> +            cpu->watchpoint_hit = wp;
> +
> +            mmap_lock();
> +            /* This call also restores vCPU state */
> +            tb_check_watchpoint(cpu, ra);
> +            if (wp->flags & BP_STOP_BEFORE_ACCESS) {
> +                cpu->exception_index = EXCP_DEBUG;
> +                mmap_unlock();
> +                cpu_loop_exit(cpu);
> +            } else {
> +                /* Force execution of one insn next time.  */
> +                cpu->cflags_next_tb = 1 | CF_LAST_IO | CF_NOIRQ
> +                                      | curr_cflags(cpu);
> +                mmap_unlock();
> +                cpu_loop_exit_noexc(cpu);
> +            }
> +        } else {
> +            wp->flags &= ~BP_WATCHPOINT_HIT;
> +        }
> +    }
> +}



  reply	other threads:[~2023-03-23  8:54 UTC|newest]

Thread overview: 124+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-27 14:00 [RESEND PULL 000/126] Buildsys / QOM / QDev / UI patches for 2023-02-27 Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 011/126] target/hppa: Extract system helpers to sys_helper.c Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 012/126] target/alpha: Remove obsolete STATUS document Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 013/126] target/loongarch/cpu: Remove unused "sysbus.h" header Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 014/126] target/loongarch/cpu: Restrict "memory.h" header to sysemu Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 015/126] target/ppc/internal: Restrict MMU declarations " Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 016/126] target/ppc/kvm: Remove unused "sysbus.h" header Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 017/126] target/ppc: Fix warning with clang-15 Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 018/126] target/riscv/cpu: Move Floating-Point fields closer Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 019/126] target/sparc/sysemu: Remove pointless CONFIG_USER_ONLY guard Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 020/126] target/xtensa/cpu: Include missing "memory.h" header Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 021/126] target/tricore: Remove unused fields from CPUTriCoreState Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 022/126] qom/object_interfaces: Fix QAPI headers included Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 023/126] trace: Do not try to include QMP commands in user emulation binaries Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 024/126] exec: Remove unused 'qemu/timer.h' timer Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 025/126] tcg: Silent -Wmissing-field-initializers warning Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 026/126] tcg/tcg-op-gvec: Remove unused "qemu/main-loop.h" header Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 027/126] accel/tcg: Restrict 'qapi-commands-machine.h' to system emulation Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 028/126] accel/xen: Remove dead code Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 029/126] accel/kvm: Silent -Wmissing-field-initializers warning Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 030/126] sysemu/kvm: Remove CONFIG_USER_ONLY guard Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 031/126] replay: Extract core API to 'exec/replay-core.h' Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 032/126] tests/unit: Restrict machine-smp.c test to system emulation Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 033/126] softmmu: Silent -Wmissing-field-initializers warning Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 034/126] softmmu: Extract watchpoint API from physmem.c Philippe Mathieu-Daudé
2023-03-23  8:54   ` Philippe Mathieu-Daudé [this message]
2023-03-23  9:00     ` David Hildenbrand
2023-02-27 14:00 ` [PULL 035/126] qemu/typedefs: Sort in case-insensitive alphabetical order (again) Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 036/126] hw/nubus/nubus-device: Fix memory leak in nubus_device_realize Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 037/126] hw/qdev: Constify DeviceState* argument of qdev_get_parent_bus() Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 038/126] hw/cpu: Extend CPUState::cluster_index documentation Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 039/126] hw/i386/x86: Reduce init_topo_info() scope Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 040/126] hw/i386/ich9: Rename Q35_MASK to ICH9_MASK Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 041/126] hw/isa/lpc_ich9: Unexport PIRQ functions Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 042/126] hw/isa/lpc_ich9: Eliminate ICH9LPCState::isa_bus Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 043/126] hw/i2c/smbus_ich9: Move ich9_smb_set_irq() in front of ich9_smbus_realize() Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 044/126] hw/i2c/smbus_ich9: Inline ich9_smb_init() and remove it Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 045/126] hw/i386/pc_q35: Allow for setting properties before realizing TYPE_ICH9_LPC_DEVICE Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 046/126] hw/isa/lpc_ich9: Connect PM stuff to LPC internally Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 047/126] hw/isa/lpc_ich9: Remove redundant ich9_lpc_reset() invocation Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 048/126] hw/i386/ich9: Remove redundant GSI_NUM_PINS Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 049/126] hw: Move ioapic*.h to intc/ Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 050/126] hw/i386/ich9: Clean up includes Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 051/126] hw: Move ich9.h to southbridge/ Philippe Mathieu-Daudé
2023-02-27 14:00 ` [PULL 052/126] hw/pci: Fix a typo Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 053/126] hw/intc/i8259: Document i8259_init() Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 054/126] hw/isa/i82378: Rename output IRQ as 'cpu_intr' Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 055/126] hw/isa/i82378: Remove intermediate IRQ forwarder Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 056/126] hw/isa/vt82c686: " Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 057/126] hw/sparc64/sun4u: Keep reference to ISA input IRQs in EbusState Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 058/126] hw/isa: Remove empty ISADeviceClass structure Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 059/126] hw/isa: Reorder to separate ISABus* vs ISADevice* functions Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 060/126] hw/isa: Un-inline isa_bus_from_device() Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 061/126] hw/isa: Rename isa_bus_irqs() -> isa_bus_register_input_irqs() Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 062/126] hw/isa: Use isa_address_space_io() to reduce access on global 'isabus' Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 063/126] hw/isa: Rename isa_get_dma() -> isa_bus_get_dma() Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 064/126] hw/isa: Factor isa_bus_get_irq() out of isa_get_irq() Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 065/126] hw: Replace isa_get_irq() by isa_bus_get_irq() when ISABus is available Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 066/126] hw/rtc/mc146818rtc: Rename RTCState -> MC146818RtcState Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 067/126] hw/rtc/mc146818rtc: Pass MC146818RtcState instead of ISADevice argument Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 068/126] hw/rtc: Rename rtc_[get|set]_memory -> mc146818rtc_[get|set]_cmos_data Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 069/126] hw/timer/hpet: Include missing 'hw/qdev-properties.h' header Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 070/126] hw/audio/hda-codec: Avoid forward-declaring HDAAudioState Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 071/126] hw/audio/es1370: Avoid forward-declaring ES1370State Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 072/126] hw/audio/es1370: Replace container_of() by ES1370() QOM cast macro Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 073/126] hw/audio/ac97: Replace container_of() by AC97() " Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 074/126] hw/audio/ac97: Split off some definitions to a header Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 075/126] hw/usb/dev-smartcard-reader: Avoid forward-declaring CCIDBus Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 076/126] hw/usb/u2f: Declare QOM macros using OBJECT_DECLARE_TYPE() Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 077/126] hw/usb/ohci: Include missing 'sysbus.h' header Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 078/126] hw/usb/ohci: Use OHCIState type definition Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 079/126] hw/usb/ohci: Code style fix comments Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 080/126] hw/usb/ohci: Code style fix white space errors Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 081/126] hw/usb/ohci: Code style fix missing braces and extra parenthesis Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 082/126] hw/usb/ohci: Move a function next to where it is used Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 083/126] hw/usb/ohci: Add trace points for register access Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 084/126] hw/usb/ohci: Fix typo Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 085/126] hw/usb/uhci: Declare QOM macros using OBJECT_DECLARE_TYPE() Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 086/126] hw/usb/uhci: Replace container_of() by UHCI_GET_CLASS() QOM macro Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 087/126] hw/usb/xhci-nec: Declare QOM macros for NEC_XHCI Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 088/126] hw/usb/xhci-nec: Replace container_of() by NEC_XHCI() QOM cast macro Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 089/126] hw/display/sm501: Embed OHCI QOM child in chipset Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 090/126] hw/display/sm501: Alias 'dma-offset' QOM property in chipset object Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 091/126] hw/display/sm501: Implement more 2D raster operations Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 092/126] hw/display/sm501: Add fallbacks to pixman routines Philippe Mathieu-Daudé
2023-04-04 17:44   ` Peter Maydell
2023-04-04 19:25     ` BALATON Zoltan
2023-04-04 20:12       ` Peter Maydell
2023-02-27 14:01 ` [PULL 093/126] hw/ppc/sam460ex: Correctly set MAL properties Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 094/126] block/vvfat: Remove pointless check of NDEBUG Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 095/126] scripts/checkpatch.pl: Do not allow assert(0) Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 096/126] MAINTAINERS: Mark IDE and Floppy as "Odd Fixes" Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 097/126] hw/i386/xen: Remove unused 'hw/ide.h' include from header Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 098/126] hw/ide/ahci: Trace ncq write command as write instead of read Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 099/126] hw/ide/mmio: Use CamelCase for MMIO_IDE state name Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 100/126] hw/ide/mmio: Extract TYPE_MMIO_IDE declarations to 'hw/ide/mmio.h' Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 101/126] hw/ide/isa: Extract TYPE_ISA_IDE declarations to 'hw/ide/isa.h' Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 102/126] hw/ide/isa: Remove intermediate ISAIDEState::irq variable Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 103/126] hw/ide/atapi: Restrict 'scsi/constants.h' inclusion Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 104/126] hw/ide: Remove unused 'qapi/qapi-types-run-state.h' Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 105/126] hw/ide: Include 'exec/ioport.h' instead of 'hw/isa/isa.h' Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 106/126] hw/ide: Un-inline ide_set_irq() Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 107/126] hw/ide: Rename ide_set_irq() -> ide_bus_set_irq() Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 108/126] hw/ide: Rename ide_create_drive() -> ide_bus_create_drive() Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 109/126] hw/ide: Rename ide_register_restart_cb -> ide_bus_register_restart_cb Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 110/126] hw/ide: Rename ide_exec_cmd() -> ide_bus_exec_cmd() Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 111/126] hw/ide: Rename ide_init2() -> ide_bus_init_output_irq() Philippe Mathieu-Daudé
2023-02-27 14:01 ` [PULL 112/126] hw/ide: Rename idebus_active_if() -> ide_bus_active_if() Philippe Mathieu-Daudé
2023-02-27 14:02 ` [PULL 113/126] hw/ide: Declare ide_get_[geometry/bios_chs_trans] in 'hw/ide/internal.h' Philippe Mathieu-Daudé
2023-02-27 14:02 ` [PULL 114/126] hw/ide/ioport: Remove unnecessary includes Philippe Mathieu-Daudé
2023-02-27 14:02 ` [PULL 115/126] hw/ide/pci: Unexport bmdma_active_if() Philippe Mathieu-Daudé
2023-02-27 14:02 ` [PULL 116/126] hw/ide/piix: Remove unused includes Philippe Mathieu-Daudé
2023-02-27 14:02 ` [PULL 117/126] hw/ide/piix: Pass Error* to pci_piix_init_ports() for better error msg Philippe Mathieu-Daudé
2023-02-27 14:02 ` [PULL 118/126] hw/ide/piix: Refactor pci_piix_init_ports as pci_piix_init_bus per bus Philippe Mathieu-Daudé
2023-02-27 14:02 ` [PULL 119/126] hw/ide/via: Replace magic 2 value by ARRAY_SIZE / MAX_IDE_DEVS Philippe Mathieu-Daudé
2023-02-27 14:02 ` [PULL 120/126] hw/ide/pci: Add PCIIDEState::isa_irq[] Philippe Mathieu-Daudé
2023-02-27 14:02 ` [PULL 121/126] dump: Replace tswapN() -> cpu_to_dumpN() Philippe Mathieu-Daudé
2023-02-27 14:02 ` [PULL 122/126] dump: Replace TARGET_PAGE_SIZE -> qemu_target_page_size() Philippe Mathieu-Daudé
2023-02-27 14:02 ` [PULL 123/126] dump: Clean included headers Philippe Mathieu-Daudé
2023-02-27 14:02 ` [PULL 124/126] dump: Simplify compiling win_dump.o by introducing win_dump_available() Philippe Mathieu-Daudé
2023-02-27 14:02 ` [PULL 125/126] dump: Add create_win_dump() stub for non-x86 targets Philippe Mathieu-Daudé
2023-02-27 14:02 ` [PULL 126/126] ui/cocoa: user friendly characters for release mouse Philippe Mathieu-Daudé
2023-02-27 18:22 ` [RESEND PULL 000/126] Buildsys / QOM / QDev / UI patches for 2023-02-27 Peter Maydell
2023-02-27 21:26   ` Philippe Mathieu-Daudé

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