From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: David Hildenbrand <david@redhat.com>,
Jason Wang <jasowang@redhat.com>, Li Qiang <liq3ea@gmail.com>,
QEMU Developers <qemu-devel@nongnu.org>,
Peter Xu <peterx@redhat.com>, Qiuhao Li <Qiuhao.Li@outlook.com>,
Alexander Bulekov <alxndr@bu.edu>, qemu-arm <qemu-arm@nongnu.org>,
Gerd Hoffmann <kraxel@redhat.com>,
Stefan Hajnoczi <stefanha@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
"Edgar E . Iglesias" <edgar.iglesias@gmail.com>
Subject: Re: [RFC PATCH v2 5/5] softmmu/physmem: Have flaview API check MemTxAttrs::bus_perm field
Date: Thu, 18 Nov 2021 22:04:54 +0100 [thread overview]
Message-ID: <c91b4ea2-3b2e-f79f-b5ad-3f01961e2974@redhat.com> (raw)
In-Reply-To: <CAFEAcA__epFKNUsZhUChOhkM18xSbm=qndCFDtVBTfm1gSz+Dw@mail.gmail.com>
On 8/24/21 16:21, Peter Maydell wrote:
> On Tue, 24 Aug 2021 at 14:50, Philippe Mathieu-Daudé <philmd@redhat.com> wrote:
>> On 8/24/21 3:15 PM, Stefan Hajnoczi wrote:
>>> On Mon, Aug 23, 2021 at 06:41:57PM +0200, Philippe Mathieu-Daudé wrote:
>>>> Check bus permission in flatview_access_allowed() before
>>>> running any bus transaction.
>>>>
>>>> There is not change for the default case (MEMTXPERM_UNSPECIFIED).
>>>>
>>>> The MEMTXPERM_UNRESTRICTED case works as an allow list. Devices
>>>> using it won't be checked by flatview_access_allowed().
>>>>
>>>> The only deny list equivalent is MEMTXPERM_RAM_DEVICE: devices
>>>> using this flag will reject transactions and set the optional
>>>> MemTxResult to MEMTX_BUS_ERROR.
>>>>
>>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>>>> ---
>>>> softmmu/physmem.c | 17 ++++++++++++++++-
>>>> 1 file changed, 16 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/softmmu/physmem.c b/softmmu/physmem.c
>>>> index 0d31a2f4199..329542dba75 100644
>>>> --- a/softmmu/physmem.c
>>>> +++ b/softmmu/physmem.c
>>>> @@ -2772,7 +2772,22 @@ static inline bool flatview_access_allowed(MemoryRegion *mr, MemTxAttrs attrs,
>>>> hwaddr addr, hwaddr len,
>>>> MemTxResult *result)
>>>> {
>>>> - return true;
>>>> + if (unlikely(attrs.bus_perm == MEMTXPERM_RAM_DEVICE)) {
>>>> + if (memory_region_is_ram(mr) || memory_region_is_ram_device(mr)) {
>>>> + return true;
>>>> + }
>>>> + qemu_log_mask(LOG_GUEST_ERROR,
>>>> + "Invalid access to non-RAM device at "
>>>> + "addr 0x%" HWADDR_PRIX ", size %" HWADDR_PRIu ", "
>>>> + "region '%s'\n", addr, len, memory_region_name(mr));
>>>> + if (result) {
>>>> + *result |= MEMTX_BUS_ERROR;
>>>
>>> Why bitwise OR?
>>
>> MemTxResult is not an enum but used as a bitfield.
>>
>> See access_with_adjusted_size():
>>
>> MemTxResult r = MEMTX_OK;
>> ...
>> if (memory_region_big_endian(mr)) {
>> for (i = 0; i < size; i += access_size) {
>> r |= access_fn(mr, addr + i, value, access_size,
>> (size - access_size - i) * 8,
>> access_mask, attrs);
>> }
>> } else {
>> for (i = 0; i < size; i += access_size) {
>> r |= access_fn(mr, addr + i, value, access_size, i * 8,
>> access_mask, attrs);
>> }
>> }
>> return r;
>> }
>>
>> and flatview_read_continue() / flatview_write_continue():
>>
>> for (;;) {
>> if (!memory_access_is_direct(mr, true)) {
>> release_lock |= prepare_mmio_access(mr);
>> l = memory_access_size(mr, l, addr1);
>> val = ldn_he_p(buf, l);
>> result |= memory_region_dispatch_write(mr, addr1, val,
>> size_memop(l),
>> attrs);
>> ...
>> return result;
>> }
>
> In these two examples we OR together the MemTxResults because
> we are looping over multiple accesses and combining all the
> results together; we want to return a "not OK" result if any
> of the individual results failed. Is that the case for
> flatview_access_allowed() ?
You are right, this is not the case here, so we can simplify as
Stefan suggested. Thanks for clarifying the examples.
next prev parent reply other threads:[~2021-11-18 21:06 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-23 16:41 [RFC PATCH v2 0/5] physmem: Have flaview API check bus permission from MemTxAttrs argument Philippe Mathieu-Daudé
2021-08-23 16:41 ` [RFC PATCH v2 1/5] softmmu/physmem: Simplify flatview_write and address_space_access_valid Philippe Mathieu-Daudé
2021-08-23 18:45 ` Peter Xu
2021-08-23 18:59 ` David Hildenbrand
2021-08-24 9:03 ` Alexander Bulekov
2021-08-24 13:04 ` Stefan Hajnoczi
2021-08-23 16:41 ` [RFC PATCH v2 2/5] hw/intc/arm_gicv3: Check for !MEMTX_OK instead of MEMTX_ERROR Philippe Mathieu-Daudé
2021-08-23 18:46 ` Peter Xu
2021-08-23 19:01 ` David Hildenbrand
2021-08-23 19:07 ` Peter Maydell
2021-08-24 13:04 ` Stefan Hajnoczi
2021-08-23 16:41 ` [RFC PATCH v2 3/5] exec/memattrs: Introduce MemTxAttrs::bus_perm field Philippe Mathieu-Daudé
2021-08-23 18:41 ` Peter Xu
2021-08-23 19:04 ` David Hildenbrand
2021-12-15 17:14 ` Philippe Mathieu-Daudé
2021-08-24 13:08 ` Stefan Hajnoczi
2021-12-15 17:11 ` Philippe Mathieu-Daudé
2021-08-23 16:41 ` [RFC PATCH v2 4/5] softmmu/physmem: Introduce flatview_access_allowed() to check bus perms Philippe Mathieu-Daudé
2021-08-23 18:43 ` Peter Xu
2021-08-23 19:03 ` David Hildenbrand
2021-08-24 13:13 ` Stefan Hajnoczi
2021-08-23 16:41 ` [RFC PATCH v2 5/5] softmmu/physmem: Have flaview API check MemTxAttrs::bus_perm field Philippe Mathieu-Daudé
2021-08-23 18:45 ` Peter Xu
2021-08-23 19:10 ` David Hildenbrand
2021-08-24 13:15 ` Stefan Hajnoczi
2021-08-24 13:50 ` Philippe Mathieu-Daudé
2021-08-24 14:21 ` Peter Maydell
2021-11-18 21:04 ` Philippe Mathieu-Daudé [this message]
2021-08-23 19:10 ` [RFC PATCH v2 0/5] physmem: Have flaview API check bus permission from MemTxAttrs argument Peter Maydell
2021-08-23 20:50 ` Peter Xu
2021-08-23 22:26 ` Alexander Bulekov
2021-08-24 7:24 ` Philippe Mathieu-Daudé
2021-08-24 9:49 ` Peter Maydell
2021-08-24 12:01 ` Gerd Hoffmann
2021-08-24 12:12 ` Li Qiang
2021-08-24 19:34 ` Peter Xu
2021-08-24 9:25 ` Edgar E. Iglesias
2021-08-24 13:26 ` Stefan Hajnoczi
2021-08-24 8:58 ` Stefan Hajnoczi
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