From: Richard Henderson <richard.henderson@linaro.org>
To: Paolo Bonzini <pbonzini@redhat.com>, qemu-devel@nongnu.org
Subject: Re: [PATCH 15/18] target/i386: move operand load and writeback out of gen_cmovcc1
Date: Thu, 19 Oct 2023 07:56:24 -0700 [thread overview]
Message-ID: <c98ed118-a6f9-40dd-919a-cb3b719cf67b@linaro.org> (raw)
In-Reply-To: <20231014100121.109817-16-pbonzini@redhat.com>
On 10/14/23 03:01, Paolo Bonzini wrote:
> Similar to gen_setcc1, make gen_cmovcc1 receive TCGv. This is more friendly
> to simultaneous implementation in the old and the new decoder.
>
> A small wart is that s->T0 of CMOV is currently the *second* argument (which
> would ordinarily be in T1). Therefore, the condition as to be inverted in
> order to overwrite s->T0 with cpu_regs[reg] if the MOV is not performed.
>
> This only applies to the old decoder, and this code will go away soon.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
> target/i386/tcg/translate.c | 20 ++++++++------------
> 1 file changed, 8 insertions(+), 12 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2023-10-19 14:57 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-14 10:01 [PATCH 00/18] target/i386: decoder changes for 8.2 Paolo Bonzini
2023-10-14 10:01 ` [PATCH 01/18] target/i386: group common checks in the decoding phase Paolo Bonzini
2023-10-18 1:23 ` Richard Henderson
2023-10-14 10:01 ` [PATCH 02/18] target/i386: validate VEX.W for AVX instructions Paolo Bonzini
2023-10-18 1:24 ` Richard Henderson
2023-10-14 10:01 ` [PATCH 03/18] target/i386: implement SHA instructions Paolo Bonzini
2023-10-19 0:25 ` Richard Henderson
2023-10-14 10:01 ` [PATCH 04/18] tests/tcg/i386: initialize more registers in test-avx Paolo Bonzini
2023-10-18 1:30 ` Richard Henderson
2023-10-14 10:01 ` [PATCH 05/18] tests/tcg/i386: test-avx: add test cases for SHA new instructions Paolo Bonzini
2023-10-14 10:01 ` [PATCH 06/18] target/i386: accept full MemOp in gen_ext_tl Paolo Bonzini
2023-10-18 1:32 ` Richard Henderson
2023-10-14 10:01 ` [PATCH 07/18] target/i386: introduce flags writeback mechanism Paolo Bonzini
2023-10-14 16:06 ` Richard Henderson
2023-10-15 14:51 ` Paolo Bonzini
2023-10-14 10:01 ` [PATCH 08/18] target/i386: implement CMPccXADD Paolo Bonzini
2023-10-19 1:59 ` Richard Henderson
2023-10-14 10:01 ` [PATCH 09/18] target/i386: do not clobber A0 in POP translation Paolo Bonzini
2023-10-18 1:33 ` Richard Henderson
2023-10-14 10:01 ` [PATCH 10/18] target/i386: reintroduce debugging mechanism Paolo Bonzini
2023-10-14 10:01 ` [PATCH 11/18] target/i386: move 00-5F opcodes to new decoder Paolo Bonzini
2023-10-19 3:24 ` Richard Henderson
2023-10-14 10:01 ` [PATCH 12/18] target/i386: adjust decoding of J operand Paolo Bonzini
2023-10-19 3:25 ` Richard Henderson
2023-10-14 10:01 ` [PATCH 13/18] target/i386: split eflags computation out of gen_compute_eflags Paolo Bonzini
2023-10-19 3:35 ` Richard Henderson
2023-10-14 10:01 ` [PATCH 14/18] target/i386: move 60-BF opcodes to new decoder Paolo Bonzini
2023-10-19 4:51 ` Richard Henderson
2023-10-14 10:01 ` [PATCH 15/18] target/i386: move operand load and writeback out of gen_cmovcc1 Paolo Bonzini
2023-10-19 14:56 ` Richard Henderson [this message]
2023-10-14 10:01 ` [PATCH 16/18] target/i386: move remaining conditional operations to new decoder Paolo Bonzini
2023-10-19 15:05 ` Richard Henderson
2023-10-14 10:01 ` [PATCH 17/18] target/i386: remove now converted opcodes from old decoder Paolo Bonzini
2023-10-19 15:15 ` Richard Henderson
2023-10-14 10:01 ` [PATCH 18/18] target/i386: remove gen_op Paolo Bonzini
2023-10-18 1:36 ` Richard Henderson
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