qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
To: Xiong Yining <xiongyining1480@phytium.com.cn>,
	rad@semihalf.com, peter.maydell@linaro.org,
	quic_llindhol@quicinc.com
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, chenbaozi@phytium.com.cn
Subject: Re: [PATCH 0/2] ARM Sbsa-ref: Enable CPU cluster topology
Date: Fri, 29 Dec 2023 13:01:53 +0100	[thread overview]
Message-ID: <c9f9c9a8-acd4-42cc-8dd8-ccaad6d74cba@linaro.org> (raw)
In-Reply-To: <20231227120722.1683361-1-xiongyining1480@phytium.com.cn>

W dniu 27.12.2023 o 13:07, Xiong Yining pisze:
> Enable CPU cluster support on SbsaQemu platform, so that users can
> specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And this
> topology can be passed to the firmware through DT cpu-map.
> 
> xiongyining1480 (2):
>    hw/arm/sbsa-ref:Enable CPU cluster on ARM sbsa machine
>    hw/arm/sbsa-ref: Add cpu-map to device tree
> 
>   hw/arm/sbsa-ref.c | 36 ++++++++++++++++++++++++++++++++++++
>   1 file changed, 36 insertions(+)
> 

Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>

Booted system with "-smp 8,sockets=2,clusters=2,cores=1,threads=2" and 
got what I wanted:

         cpus {
                 #size-cells = <0x00>;
                 #address-cells = <0x02>;

                 cpu-map {
                         socket0 {
                                 cluster0 {
                                         core0 {
                                                 thread0 {
                                                         cpu = <0x8007>;
                                                 };
                                                 thread1 {
                                                         cpu = <0x8006>;
                                                 };
                                         };
                                 };
                                 cluster1 {
                                         core0 {
                                                 thread0 {
                                                         cpu = <0x8005>;
                                                 };
                                                 thread1 {
                                                         cpu = <0x8004>;
                                                 };
                                         };
                                 };
                         };
                         socket1 {
                                 cluster0 {
                                         core0 {
                                                 thread0 {
                                                         cpu = <0x8003>;
                                                 };
                                                 thread1 {
                                                         cpu = <0x8002>;
                                                 };
                                         };
                                 };
                                 cluster1 {
                                         core0 {
                                                 thread0 {
                                                         cpu = <0x8001>;
                                                 };
                                                 thread1 {
                                                         cpu = <0x8000>;
                                                 };
                                         };
                                 };
                         };
                 };

                 cpu@0 {
                         phandle = <0x8007>;
                         reg = <0x00 0x00>;
                 };

                 cpu@1 {
                         phandle = <0x8006>;
                         reg = <0x00 0x01>;
                 };

                 cpu@2 {
                         phandle = <0x8005>;
                         reg = <0x00 0x02>;
                 };

                 cpu@3 {
                         phandle = <0x8004>;
                         reg = <0x00 0x03>;
                 };

                 cpu@4 {
                         phandle = <0x8003>;
                         reg = <0x00 0x04>;
                 };

                 cpu@5 {
                         phandle = <0x8002>;
                         reg = <0x00 0x05>;
                 };

                 cpu@6 {
                         phandle = <0x8001>;
                         reg = <0x00 0x06>;
                 };

                 cpu@7 {
                         phandle = <0x8000>;
                         reg = <0x00 0x07>;
                 };
         };


      parent reply	other threads:[~2023-12-29 12:02 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-27 12:07 [PATCH 0/2] ARM Sbsa-ref: Enable CPU cluster topology Xiong Yining
2023-12-27 12:07 ` [PATCH 1/2] hw/arm/sbsa-ref:Enable CPU cluster on ARM sbsa machine Xiong Yining
2023-12-27 12:07 ` [PATCH 2/2] hw/arm/sbsa-ref: Add cpu-map to device tree Xiong Yining
2023-12-29 11:58   ` Marcin Juszkiewicz
2023-12-29 12:01 ` Marcin Juszkiewicz [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=c9f9c9a8-acd4-42cc-8dd8-ccaad6d74cba@linaro.org \
    --to=marcin.juszkiewicz@linaro.org \
    --cc=chenbaozi@phytium.com.cn \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=quic_llindhol@quicinc.com \
    --cc=rad@semihalf.com \
    --cc=xiongyining1480@phytium.com.cn \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).