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* [PATCH 0/2] ARM Sbsa-ref: Enable CPU cluster topology
@ 2023-12-27 12:07 Xiong Yining
  2023-12-27 12:07 ` [PATCH 1/2] hw/arm/sbsa-ref:Enable CPU cluster on ARM sbsa machine Xiong Yining
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Xiong Yining @ 2023-12-27 12:07 UTC (permalink / raw)
  To: rad, peter.maydell, quic_llindhol, marcin.juszkiewicz
  Cc: qemu-arm, qemu-devel, chenbaozi, Xiong Yining

Enable CPU cluster support on SbsaQemu platform, so that users can
specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And this
topology can be passed to the firmware through DT cpu-map.

xiongyining1480 (2):
  hw/arm/sbsa-ref:Enable CPU cluster on ARM sbsa machine
  hw/arm/sbsa-ref: Add cpu-map to device tree

 hw/arm/sbsa-ref.c | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

-- 
2.34.1



^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 1/2] hw/arm/sbsa-ref:Enable CPU cluster on ARM sbsa machine
  2023-12-27 12:07 [PATCH 0/2] ARM Sbsa-ref: Enable CPU cluster topology Xiong Yining
@ 2023-12-27 12:07 ` Xiong Yining
  2023-12-27 12:07 ` [PATCH 2/2] hw/arm/sbsa-ref: Add cpu-map to device tree Xiong Yining
  2023-12-29 12:01 ` [PATCH 0/2] ARM Sbsa-ref: Enable CPU cluster topology Marcin Juszkiewicz
  2 siblings, 0 replies; 5+ messages in thread
From: Xiong Yining @ 2023-12-27 12:07 UTC (permalink / raw)
  To: rad, peter.maydell, quic_llindhol, marcin.juszkiewicz
  Cc: qemu-arm, qemu-devel, chenbaozi, xiongyining1480

From: xiongyining1480 <xiongyining1480@phytium.com.cn>

Enable the CPU cluster on ARM sbsa machine, so user can configure the
cluster hierarchy.

Signed-off-by: Xiong Yining <xiongyining1480@phytium.com.cn>
Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn>
---
 hw/arm/sbsa-ref.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index f3c9704693..e6cd612bc5 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -911,6 +911,7 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *data)
     mc->default_ram_size = 1 * GiB;
     mc->default_ram_id = "sbsa-ref.ram";
     mc->default_cpus = 4;
+    mc->smp_props.clusters_supported = true;
     mc->possible_cpu_arch_ids = sbsa_ref_possible_cpu_arch_ids;
     mc->cpu_index_to_instance_props = sbsa_ref_cpu_index_to_props;
     mc->get_default_cpu_node_id = sbsa_ref_get_default_cpu_node_id;
-- 
2.34.1



^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/2] hw/arm/sbsa-ref: Add cpu-map to device tree
  2023-12-27 12:07 [PATCH 0/2] ARM Sbsa-ref: Enable CPU cluster topology Xiong Yining
  2023-12-27 12:07 ` [PATCH 1/2] hw/arm/sbsa-ref:Enable CPU cluster on ARM sbsa machine Xiong Yining
@ 2023-12-27 12:07 ` Xiong Yining
  2023-12-29 11:58   ` Marcin Juszkiewicz
  2023-12-29 12:01 ` [PATCH 0/2] ARM Sbsa-ref: Enable CPU cluster topology Marcin Juszkiewicz
  2 siblings, 1 reply; 5+ messages in thread
From: Xiong Yining @ 2023-12-27 12:07 UTC (permalink / raw)
  To: rad, peter.maydell, quic_llindhol, marcin.juszkiewicz
  Cc: qemu-arm, qemu-devel, chenbaozi, xiongyining1480

From: xiongyining1480 <xiongyining1480@phytium.com.cn>

Support CPU topology description through device tree.

Signed-off-by: Xiong Yining <xiongyining1480@phytium.com.cn>
Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn>
---
 hw/arm/sbsa-ref.c | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index e6cd612bc5..a3c851148a 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -283,10 +283,45 @@ static void create_fdt(SBSAMachineState *sms)
                 ms->possible_cpus->cpus[cs->cpu_index].props.node_id);
         }
 
+        qemu_fdt_setprop_cell(sms->fdt, nodename, "phandle",
+                        qemu_fdt_alloc_phandle(sms->fdt));
+
         g_free(nodename);
     }
 
+
     sbsa_fdt_add_gic_node(sms);
+
+    /*
+     * Add vCPU topology description through fdt node cpu-map.
+     */
+    qemu_fdt_add_subnode(sms->fdt, "/cpus/cpu-map");
+
+    for (cpu = sms->smp_cpus - 1; cpu >= 0; cpu--) {
+        char *cpu_path = g_strdup_printf("/cpus/cpu@%d", cpu);
+        char *map_path;
+
+        if (ms->smp.threads > 1) {
+            map_path = g_strdup_printf(
+                "/cpus/cpu-map/socket%d/cluster%d/core%d/thread%d",
+                cpu / (ms->smp.clusters * ms->smp.cores * ms->smp.threads),
+                (cpu / (ms->smp.cores * ms->smp.threads)) % ms->smp.clusters,
+                (cpu / ms->smp.threads) % ms->smp.cores,
+                cpu % ms->smp.threads);
+        } else {
+            map_path = g_strdup_printf(
+                "/cpus/cpu-map/socket%d/cluster%d/core%d",
+                cpu / (ms->smp.clusters * ms->smp.cores),
+                (cpu / ms->smp.cores) % ms->smp.clusters,
+                cpu % ms->smp.cores);
+        }
+        qemu_fdt_add_path(sms->fdt, map_path);
+        qemu_fdt_setprop_phandle(sms->fdt, map_path, "cpu", cpu_path);
+
+        g_free(map_path);
+        g_free(cpu_path);
+    }
+
 }
 
 #define SBSA_FLASH_SECTOR_SIZE (256 * KiB)
-- 
2.34.1



^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] hw/arm/sbsa-ref: Add cpu-map to device tree
  2023-12-27 12:07 ` [PATCH 2/2] hw/arm/sbsa-ref: Add cpu-map to device tree Xiong Yining
@ 2023-12-29 11:58   ` Marcin Juszkiewicz
  0 siblings, 0 replies; 5+ messages in thread
From: Marcin Juszkiewicz @ 2023-12-29 11:58 UTC (permalink / raw)
  To: Xiong Yining, rad, peter.maydell, quic_llindhol
  Cc: qemu-arm, qemu-devel, chenbaozi

W dniu 27.12.2023 o 13:07, Xiong Yining pisze:
> From: xiongyining1480 <xiongyining1480@phytium.com.cn>
> 
> Support CPU topology description through device tree.
> 
> Signed-off-by: Xiong Yining <xiongyining1480@phytium.com.cn>
> Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn>
> ---
>   hw/arm/sbsa-ref.c | 35 +++++++++++++++++++++++++++++++++++
>   1 file changed, 35 insertions(+)
> 
> diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
> index e6cd612bc5..a3c851148a 100644
> --- a/hw/arm/sbsa-ref.c
> +++ b/hw/arm/sbsa-ref.c
> @@ -283,10 +283,45 @@ static void create_fdt(SBSAMachineState *sms)
>                   ms->possible_cpus->cpus[cs->cpu_index].props.node_id);
>           }
>   
> +        qemu_fdt_setprop_cell(sms->fdt, nodename, "phandle",
> +                        qemu_fdt_alloc_phandle(sms->fdt));
> +
>           g_free(nodename);
>       }
>   
> +
>       sbsa_fdt_add_gic_node(sms);

Can you add vCPU topology code before ^^ line? So code would add /cpus/ 
node and then go for /intc/ node.

> +
> +    /*
> +     * Add vCPU topology description through fdt node cpu-map.

Maybe worth adding pointer to hw/arm/virt.c code for longer description?

> +     */
> +    qemu_fdt_add_subnode(sms->fdt, "/cpus/cpu-map");
> +
> +    for (cpu = sms->smp_cpus - 1; cpu >= 0; cpu--) {
> +        char *cpu_path = g_strdup_printf("/cpus/cpu@%d", cpu);
> +        char *map_path;
> +
> +        if (ms->smp.threads > 1) {
> +            map_path = g_strdup_printf(
> +                "/cpus/cpu-map/socket%d/cluster%d/core%d/thread%d",
> +                cpu / (ms->smp.clusters * ms->smp.cores * ms->smp.threads),
> +                (cpu / (ms->smp.cores * ms->smp.threads)) % ms->smp.clusters,
> +                (cpu / ms->smp.threads) % ms->smp.cores,
> +                cpu % ms->smp.threads);
> +        } else {
> +            map_path = g_strdup_printf(
> +                "/cpus/cpu-map/socket%d/cluster%d/core%d",
> +                cpu / (ms->smp.clusters * ms->smp.cores),
> +                (cpu / ms->smp.cores) % ms->smp.clusters,
> +                cpu % ms->smp.cores);
> +        }
> +        qemu_fdt_add_path(sms->fdt, map_path);
> +        qemu_fdt_setprop_phandle(sms->fdt, map_path, "cpu", cpu_path);
> +
> +        g_free(map_path);
> +        g_free(cpu_path);
> +    }
> +
>   }
>   
>   #define SBSA_FLASH_SECTOR_SIZE (256 * KiB)



^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 0/2] ARM Sbsa-ref: Enable CPU cluster topology
  2023-12-27 12:07 [PATCH 0/2] ARM Sbsa-ref: Enable CPU cluster topology Xiong Yining
  2023-12-27 12:07 ` [PATCH 1/2] hw/arm/sbsa-ref:Enable CPU cluster on ARM sbsa machine Xiong Yining
  2023-12-27 12:07 ` [PATCH 2/2] hw/arm/sbsa-ref: Add cpu-map to device tree Xiong Yining
@ 2023-12-29 12:01 ` Marcin Juszkiewicz
  2 siblings, 0 replies; 5+ messages in thread
From: Marcin Juszkiewicz @ 2023-12-29 12:01 UTC (permalink / raw)
  To: Xiong Yining, rad, peter.maydell, quic_llindhol
  Cc: qemu-arm, qemu-devel, chenbaozi

W dniu 27.12.2023 o 13:07, Xiong Yining pisze:
> Enable CPU cluster support on SbsaQemu platform, so that users can
> specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And this
> topology can be passed to the firmware through DT cpu-map.
> 
> xiongyining1480 (2):
>    hw/arm/sbsa-ref:Enable CPU cluster on ARM sbsa machine
>    hw/arm/sbsa-ref: Add cpu-map to device tree
> 
>   hw/arm/sbsa-ref.c | 36 ++++++++++++++++++++++++++++++++++++
>   1 file changed, 36 insertions(+)
> 

Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>

Booted system with "-smp 8,sockets=2,clusters=2,cores=1,threads=2" and 
got what I wanted:

         cpus {
                 #size-cells = <0x00>;
                 #address-cells = <0x02>;

                 cpu-map {
                         socket0 {
                                 cluster0 {
                                         core0 {
                                                 thread0 {
                                                         cpu = <0x8007>;
                                                 };
                                                 thread1 {
                                                         cpu = <0x8006>;
                                                 };
                                         };
                                 };
                                 cluster1 {
                                         core0 {
                                                 thread0 {
                                                         cpu = <0x8005>;
                                                 };
                                                 thread1 {
                                                         cpu = <0x8004>;
                                                 };
                                         };
                                 };
                         };
                         socket1 {
                                 cluster0 {
                                         core0 {
                                                 thread0 {
                                                         cpu = <0x8003>;
                                                 };
                                                 thread1 {
                                                         cpu = <0x8002>;
                                                 };
                                         };
                                 };
                                 cluster1 {
                                         core0 {
                                                 thread0 {
                                                         cpu = <0x8001>;
                                                 };
                                                 thread1 {
                                                         cpu = <0x8000>;
                                                 };
                                         };
                                 };
                         };
                 };

                 cpu@0 {
                         phandle = <0x8007>;
                         reg = <0x00 0x00>;
                 };

                 cpu@1 {
                         phandle = <0x8006>;
                         reg = <0x00 0x01>;
                 };

                 cpu@2 {
                         phandle = <0x8005>;
                         reg = <0x00 0x02>;
                 };

                 cpu@3 {
                         phandle = <0x8004>;
                         reg = <0x00 0x03>;
                 };

                 cpu@4 {
                         phandle = <0x8003>;
                         reg = <0x00 0x04>;
                 };

                 cpu@5 {
                         phandle = <0x8002>;
                         reg = <0x00 0x05>;
                 };

                 cpu@6 {
                         phandle = <0x8001>;
                         reg = <0x00 0x06>;
                 };

                 cpu@7 {
                         phandle = <0x8000>;
                         reg = <0x00 0x07>;
                 };
         };


^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2023-12-29 12:02 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2023-12-27 12:07 [PATCH 0/2] ARM Sbsa-ref: Enable CPU cluster topology Xiong Yining
2023-12-27 12:07 ` [PATCH 1/2] hw/arm/sbsa-ref:Enable CPU cluster on ARM sbsa machine Xiong Yining
2023-12-27 12:07 ` [PATCH 2/2] hw/arm/sbsa-ref: Add cpu-map to device tree Xiong Yining
2023-12-29 11:58   ` Marcin Juszkiewicz
2023-12-29 12:01 ` [PATCH 0/2] ARM Sbsa-ref: Enable CPU cluster topology Marcin Juszkiewicz

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