From: Yi Liu <yi.l.liu@intel.com>
To: CLEMENT MATHIEU--DRIF <clement.mathieu--drif@eviden.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "jasowang@redhat.com" <jasowang@redhat.com>,
"zhenzhong.duan@intel.com" <zhenzhong.duan@intel.com>,
"kevin.tian@intel.com" <kevin.tian@intel.com>,
"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
"peterx@redhat.com" <peterx@redhat.com>,
"mst@redhat.com" <mst@redhat.com>
Subject: Re: [PATCH ats_vtd v5 19/22] memory: add an API for ATS support
Date: Wed, 3 Jul 2024 20:14:39 +0800 [thread overview]
Message-ID: <ca43f372-413e-4e3f-b4d9-26164f5cb7db@intel.com> (raw)
In-Reply-To: <20240702055221.1337035-20-clement.mathieu--drif@eviden.com>
On 2024/7/2 13:52, CLEMENT MATHIEU--DRIF wrote:
> From: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
>
> IOMMU have to implement iommu_ats_request_translation to support ATS.
>
> Devices can use IOMMU_TLB_ENTRY_TRANSLATION_ERROR to check the tlb
> entries returned by a translation request.
>
> Signed-off-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
> ---
> include/exec/memory.h | 26 ++++++++++++++++++++++++++
> system/memory.c | 20 ++++++++++++++++++++
> 2 files changed, 46 insertions(+)
>
> diff --git a/include/exec/memory.h b/include/exec/memory.h
> index 003ee06610..48555c87c6 100644
> --- a/include/exec/memory.h
> +++ b/include/exec/memory.h
> @@ -148,6 +148,10 @@ struct IOMMUTLBEntry {
> uint32_t pasid;
> };
>
> +/* Check if an IOMMU TLB entry indicates a translation error */
> +#define IOMMU_TLB_ENTRY_TRANSLATION_ERROR(entry) ((((entry)->perm) & IOMMU_RW) \
> + == IOMMU_NONE)
> +
> /*
> * Bitmap for different IOMMUNotifier capabilities. Each notifier can
> * register with one or multiple IOMMU Notifier capability bit(s).
> @@ -571,6 +575,20 @@ struct IOMMUMemoryRegionClass {
> int (*iommu_set_iova_ranges)(IOMMUMemoryRegion *iommu,
> GList *iova_ranges,
> Error **errp);
> +
> + /**
> + * @iommu_ats_request_translation:
> + * This method must be implemented if the IOMMU has ATS enabled
> + *
> + * @see pci_ats_request_translation_pasid
> + */
> + ssize_t (*iommu_ats_request_translation)(IOMMUMemoryRegion *iommu,
> + bool priv_req, bool exec_req,
> + hwaddr addr, size_t length,
> + bool no_write,
> + IOMMUTLBEntry *result,
> + size_t result_length,
> + uint32_t *err_count);
> };
>
I'm not quite understanding why the existing translate() does not work.
Could you elaborate?
> typedef struct RamDiscardListener RamDiscardListener;
> @@ -1926,6 +1944,14 @@ void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n);
> void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
> IOMMUNotifier *n);
>
> +ssize_t memory_region_iommu_ats_request_translation(IOMMUMemoryRegion *iommu_mr,
> + bool priv_req, bool exec_req,
> + hwaddr addr, size_t length,
> + bool no_write,
> + IOMMUTLBEntry *result,
> + size_t result_length,
> + uint32_t *err_count);
> +
> /**
> * memory_region_iommu_get_attr: return an IOMMU attr if get_attr() is
> * defined on the IOMMU.
> diff --git a/system/memory.c b/system/memory.c
> index 74cd73ebc7..8268df7bf5 100644
> --- a/system/memory.c
> +++ b/system/memory.c
> @@ -2005,6 +2005,26 @@ void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
> memory_region_update_iommu_notify_flags(iommu_mr, NULL);
> }
>
> +ssize_t memory_region_iommu_ats_request_translation(IOMMUMemoryRegion *iommu_mr,
> + bool priv_req,
> + bool exec_req,
> + hwaddr addr, size_t length,
> + bool no_write,
> + IOMMUTLBEntry *result,
> + size_t result_length,
> + uint32_t *err_count)
> +{
> + IOMMUMemoryRegionClass *imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
> +
> + if (!imrc->iommu_ats_request_translation) {
> + return -ENODEV;
> + }
> +
> + return imrc->iommu_ats_request_translation(iommu_mr, priv_req, exec_req,
> + addr, length, no_write, result,
> + result_length, err_count);
> +}
> +
> void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
> IOMMUTLBEvent *event)
> {
--
Regards,
Yi Liu
next prev parent reply other threads:[~2024-07-03 12:11 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-02 5:52 [PATCH ats_vtd v5 00/22] ATS support for VT-d CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 01/22] intel_iommu: fix FRCD construction macro CLEMENT MATHIEU--DRIF
2024-07-02 13:01 ` Yi Liu
2024-07-02 15:10 ` CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 02/22] intel_iommu: make types match CLEMENT MATHIEU--DRIF
2024-07-02 13:20 ` Yi Liu
2024-07-02 5:52 ` [PATCH ats_vtd v5 03/22] intel_iommu: return page walk level even when the translation fails CLEMENT MATHIEU--DRIF
2024-07-03 11:59 ` Yi Liu
2024-07-04 4:23 ` CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 05/22] memory: add permissions in IOMMUAccessFlags CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor CLEMENT MATHIEU--DRIF
2024-07-02 13:33 ` Yi Liu
2024-07-02 15:29 ` CLEMENT MATHIEU--DRIF
2024-07-02 15:40 ` cmd
2024-07-03 7:29 ` Yi Liu
2024-07-03 8:28 ` cmd
2024-07-04 4:23 ` CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 06/22] pcie: add helper to declare PASID capability for a pcie device CLEMENT MATHIEU--DRIF
2024-07-03 12:04 ` Yi Liu
2024-07-04 4:25 ` CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 07/22] pcie: helper functions to check if PASID and ATS are enabled CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 08/22] intel_iommu: declare supported PASID size CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 09/22] pci: cache the bus mastering status in the device CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 10/22] pci: add IOMMU operations to get address spaces and memory regions with PASID CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 11/22] memory: store user data pointer in the IOMMU notifiers CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 12/22] pci: add a pci-level initialization function for iommu notifiers CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 13/22] intel_iommu: implement the get_address_space_pasid iommu operation CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 15/22] memory: Allow to store the PASID in IOMMUTLBEntry CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 14/22] intel_iommu: implement the get_memory_region_pasid iommu operation CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 16/22] intel_iommu: fill the PASID field when creating an instance of IOMMUTLBEntry CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 17/22] atc: generic ATC that can be used by PCIe devices that support SVM CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 18/22] atc: add unit tests CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 19/22] memory: add an API for ATS support CLEMENT MATHIEU--DRIF
2024-07-03 12:14 ` Yi Liu [this message]
2024-07-04 4:30 ` CLEMENT MATHIEU--DRIF
2024-07-04 12:52 ` Yi Liu
2024-07-02 5:52 ` [PATCH ats_vtd v5 20/22] pci: add a pci-level API for ATS CLEMENT MATHIEU--DRIF
2024-07-09 10:15 ` Minwoo Im
2024-07-09 11:58 ` CLEMENT MATHIEU--DRIF
2024-07-09 21:17 ` Minwoo Im
2024-07-10 5:17 ` CLEMENT MATHIEU--DRIF
2024-07-11 8:04 ` Minwoo Im
2024-07-11 19:00 ` CLEMENT MATHIEU--DRIF
2024-07-17 23:44 ` Minwoo Im
2024-07-18 7:46 ` CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 21/22] intel_iommu: set the address mask even when a translation fails CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 22/22] intel_iommu: add support for ATS CLEMENT MATHIEU--DRIF
2024-07-02 12:16 ` [PATCH ats_vtd v5 00/22] ATS support for VT-d Michael S. Tsirkin
2024-07-02 15:09 ` CLEMENT MATHIEU--DRIF
2024-07-02 13:44 ` Yi Liu
2024-07-02 15:12 ` CLEMENT MATHIEU--DRIF
2024-07-03 12:32 ` Yi Liu
2024-07-04 4:36 ` CLEMENT MATHIEU--DRIF
2024-07-04 8:14 ` Yi Liu
-- strict thread matches above, loose matches on Subject: below --
2024-06-03 5:59 CLEMENT MATHIEU--DRIF
2024-06-03 5:59 ` [PATCH ats_vtd v5 19/22] memory: add an API for ATS support CLEMENT MATHIEU--DRIF
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