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From: Laurent Vivier <laurent@vivier.eu>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Subject: Re: [PATCH 0/2] target/m68k: Enable halt insn for 68060
Date: Thu, 26 May 2022 19:08:10 +0200	[thread overview]
Message-ID: <ca5f326a-7f48-f872-a3f4-3c4823d1409d@vivier.eu> (raw)
In-Reply-To: <20220430170225.326447-1-richard.henderson@linaro.org>

Le 30/04/2022 à 19:02, Richard Henderson a écrit :
> While looking at semihosting, I noticed that 060 does have halt.
> 
> Then I was a bit surprised that it wasn't being disassembled and
> thought trying to exactly match disassembly to cpu was a bit
> frought with peril -- one also wants to know what the insn was
> *supposed* to be when it raises SIGILL.
> 
> 
> r~
> 
> 
> Richard Henderson (2):
>    target/m68k: Clear mach in m68k_cpu_disas_set_info
>    target/m68k: Enable halt insn for 68060
> 
>   target/m68k/cpu.c       | 6 +-----
>   target/m68k/translate.c | 1 +
>   2 files changed, 2 insertions(+), 5 deletions(-)
> 

Series applied to my m68k-for-7.1 branch

Thanks,
Laurent


      parent reply	other threads:[~2022-05-26 17:09 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-30 17:02 [PATCH 0/2] target/m68k: Enable halt insn for 68060 Richard Henderson
2022-04-30 17:02 ` [PATCH 1/2] target/m68k: Clear mach in m68k_cpu_disas_set_info Richard Henderson
2022-05-17 14:06   ` Laurent Vivier
2022-05-17 16:06     ` Richard Henderson
2022-05-18 21:57   ` Laurent Vivier
2022-04-30 17:02 ` [PATCH 2/2] target/m68k: Enable halt insn for 68060 Richard Henderson
2022-05-17 14:09   ` Laurent Vivier
2022-05-26 17:08 ` Laurent Vivier [this message]

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