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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-459e5862fd9sm298135075e9.16.2025.08.11.21.06.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 Aug 2025 21:06:38 -0700 (PDT) Message-ID: Date: Tue, 12 Aug 2025 06:06:37 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 05/11] target/arm: Introduce arm_hw_accel_cpu_feature_supported() To: Richard Henderson , qemu-devel@nongnu.org References: <20250811170611.37482-1-philmd@linaro.org> <20250811170611.37482-6-philmd@linaro.org> <2e5d40ac-927f-4109-b285-c0635b959066@linaro.org> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <2e5d40ac-927f-4109-b285-c0635b959066@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 12/8/25 02:35, Richard Henderson wrote: > On 8/12/25 03:06, Philippe Mathieu-Daudé wrote: >> Introduce arm_hw_accel_cpu_feature_supported() helper, >> an accelerator implementation to return whether a ARM >> feature is supported by host hardware. Allow optional >> fallback on emulation. >> >> Signed-off-by: Philippe Mathieu-Daudé >> --- >>   target/arm/cpu.h     | 12 ++++++++++++ >>   target/arm/hvf/hvf.c | 20 ++++++++++++++++++++ >>   target/arm/kvm.c     | 22 ++++++++++++++++++++++ >>   3 files changed, 54 insertions(+) >> >> diff --git a/target/arm/cpu.h b/target/arm/cpu.h >> index dc9b6dce4c9..5136c4caabf 100644 >> --- a/target/arm/cpu.h >> +++ b/target/arm/cpu.h >> @@ -2507,6 +2507,18 @@ static inline ARMSecuritySpace >> arm_secure_to_space(bool secure) >>   } >>   #if !defined(CONFIG_USER_ONLY) >> + >> +/** >> + * arm_hw_accel_cpu_feature_supported: >> + * @feat: Feature to test for support >> + * @can_emulate: Whether Allow to fall back to emulation if @feat is not >> + *               supported by hardware accelerator >> + * >> + * Hardware accelerator implementation of cpu_feature_supported(). >> + */ >> +bool arm_hw_accel_cpu_feature_supported(enum arm_features feat, >> +                                        bool can_emulate); > > internals.h. > > I guess this is ok.  If we ignore xen, which is a thing of its own, we Does Xen manage vCPUs runtime? > don't currently have more than one accelerator per OS.  That hasn't > always been true for x86, where we had 2 or 3 at once for Windows. I felt than adding as per-target per-accel methods would be over engineering at this point, but I can give it a try if preferred.