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([2001:8003:501a:d301:93c4:c1c9:4368:47fa]) by smtp.gmail.com with ESMTPSA id u8-20020a170902714800b00177fb862a87sm1604518plm.20.2022.10.27.13.22.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 27 Oct 2022 13:22:55 -0700 (PDT) Message-ID: Date: Fri, 28 Oct 2022 06:22:49 +1000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH 1/2] hw/arm/boot: Set SME and SVE EL3 vector lengths when booting kernel Content-Language: en-US To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Jerome Forissier References: <20221027140207.413084-1-peter.maydell@linaro.org> <20221027140207.413084-2-peter.maydell@linaro.org> From: Richard Henderson In-Reply-To: <20221027140207.413084-2-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 10/28/22 00:02, Peter Maydell wrote: > When we direct boot a kernel on a CPU which emulates EL3, we need > to set up the EL3 system registers as the Linux kernel documentation > specifies: > https://www.kernel.org/doc/Documentation/arm64/booting.rst > > For SVE and SME this includes: > - ZCR_EL3.LEN must be initialised to the same value for all CPUs the > kernel is executed on. > - SMCR_EL3.LEN must be initialised to the same value for all CPUs the > kernel will execute on. > > Although we are technically compliant with this, the "same value" we > currently use by default is the reset value of 0. This will end up > forcing the guest kernel's SVE and SME vector length to be only the > smallest supported length. > > Initialize the vector length fields to their maximum possible value, > which is 0xf. If the implementation doesn't actually support that > vector length then the effective vector length will be constrained > down to the maximum supported value at point of use. > > This allows the guest to use all the vector lengths the emulated CPU > supports (by programming the _EL2 and _EL1 versions of these > registers.) > > Signed-off-by: Peter Maydell > --- > hw/arm/boot.c | 2 ++ > 1 file changed, 2 insertions(+) Reviewed-by: Richard Henderson r~