From: Richard Henderson <richard.henderson@linaro.org>
To: Stephen Long <steplong@quicinc.com>, qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, apazos@quicinc.com
Subject: Re: [PATCH v3] target/arm: Implement SVE2 FMMLA
Date: Fri, 24 Apr 2020 13:38:17 -0700 [thread overview]
Message-ID: <caeb437f-f21d-652a-3721-44a9265785cf@linaro.org> (raw)
In-Reply-To: <20200422165503.13511-1-steplong@quicinc.com>
On 4/22/20 9:55 AM, Stephen Long wrote:
> + intptr_t opr_sz = simd_oprsz(desc) / (sizeof(TYPE) >> 2); \
> + \
> + for (s = 0; s < opr_sz; ++s) { \
> + TYPE *n = vn + s * (sizeof(TYPE) >> 2); \
> + TYPE *m = vm + s * (sizeof(TYPE) >> 2); \
> + TYPE *a = va + s * (sizeof(TYPE) >> 2); \
> + TYPE *d = vd + s * (sizeof(TYPE) >> 2); \
Shifting the wrong way. Need to multiply by 4 not divide.
I've fixed this up, and also expanded the macro to two functions; I think it's
clearer that way in this case.
Applied to my SVE2 branch. Thanks,
r~
prev parent reply other threads:[~2020-04-24 20:39 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-22 16:55 [PATCH v3] target/arm: Implement SVE2 FMMLA Stephen Long
2020-04-24 20:38 ` Richard Henderson [this message]
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