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From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
	Jinjie Ruan <ruanjinjie@huawei.com>
Cc: eduardo@habkost.net, marcel.apfelbaum@gmail.com,
	philmd@linaro.org, wangyanan55@huawei.com, qemu-devel@nongnu.org,
	qemu-arm@nongnu.org
Subject: Re: [RFC PATCH v8 06/23] target/arm: Add support for Non-maskable Interrupt
Date: Tue, 19 Mar 2024 08:51:46 -1000	[thread overview]
Message-ID: <cb5d981a-6db4-479c-9eaa-bca49c40bc72@linaro.org> (raw)
In-Reply-To: <CAFEAcA_xSHAJnn0_O9=zGo9u8omzhuB_WvuMo9gf7wKt8OVDmw@mail.gmail.com>

On 3/19/24 07:28, Peter Maydell wrote:
>>       switch (excp_idx) {
>> +    case EXCP_NMI:
>> +        pstate_unmasked = !allIntMask;
>> +        break;
>> +
>> +    case EXCP_VNMI:
>> +        if ((!(hcr_el2 & HCR_IMO) && !(hcr_el2 & HCR_FMO)) ||
>> +             (hcr_el2 & HCR_TGE)) {
>> +            /* VNMIs(VIRQs or VFIQs) are only taken when hypervized.  */
>> +            return false;
>> +        }
> 
> VINMI and VFNMI aren't the same thing: do we definitely want to
> merge them into one EXCP_VNMI ?

We do not, which is why VFNMI is going through EXCP_VFIQ.  A previous version did, and I 
see the comment did not change to match the new implementation.

> The use of the _eff() versions of the functions here is
> correct but it introduces a new case where we need to
> reevaluate the status of the VNMI etc interrupt status:
> when we change from Secure to NonSecure or when we change
> SCR_EL3.EEL2 or SCR_EL3.HXEN. We either need to make sure
> we reevaluate when we drop from EL3 to EL2 (which would be
> OK since VINMI and VFNMI can't be taken at EL3 and none of
> these bits can change except at EL3) or else make the calls
> to reevaluate them when we write to SCR_EL3. At least, I don't
> think we currently reevaluate these bits on an EL change.

We re-evaluate these bits on EL change via gicv3_cpuif_el_change_hook.


r~


  reply	other threads:[~2024-03-19 18:52 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-18  9:35 [RFC PATCH v8 00/23] target/arm: Implement FEAT_NMI and FEAT_GICv3_NMI Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 01/23] target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NMI Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 02/23] target/arm: Add PSTATE.ALLINT Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 03/23] target/arm: Add support for FEAT_NMI, Non-maskable Interrupt Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 04/23] target/arm: Implement ALLINT MSR (immediate) Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 05/23] target/arm: Support MSR access to ALLINT Jinjie Ruan via
2024-03-19 16:45   ` Peter Maydell
2024-03-20  3:13     ` Jinjie Ruan via
2024-03-19 17:30   ` Peter Maydell
2024-03-20  3:21     ` Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 06/23] target/arm: Add support for Non-maskable Interrupt Jinjie Ruan via
2024-03-19 17:28   ` Peter Maydell
2024-03-19 18:51     ` Richard Henderson [this message]
2024-03-19 19:26       ` Peter Maydell
2024-03-20  9:49         ` Jinjie Ruan via
2024-03-21  9:26     ` Jinjie Ruan via
2024-03-21  9:59       ` Peter Maydell
2024-03-21 11:41   ` Peter Maydell
2024-03-18  9:35 ` [RFC PATCH v8 07/23] target/arm: Add support for NMI in arm_phys_excp_target_el() Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 08/23] target/arm: Handle IS/FS in ISR_EL1 for NMI Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 09/23] target/arm: Handle PSTATE.ALLINT on taking an exception Jinjie Ruan via
2024-03-19 16:47   ` Peter Maydell
2024-03-28  8:56     ` Jinjie Ruan via
2024-03-28 10:46       ` Peter Maydell
2024-03-18  9:35 ` [RFC PATCH v8 10/23] hw/arm/virt: Wire NMI and VNMI irq lines from GIC to CPU Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 11/23] hw/intc/arm_gicv3: Add external IRQ lines for NMI Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 12/23] target/arm: Handle NMI in arm_cpu_do_interrupt_aarch64() Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 13/23] hw/intc/arm_gicv3: Add irq superpriority information Jinjie Ruan via
2024-03-21 13:17   ` Peter Maydell
2024-03-22  2:54     ` Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 14/23] hw/intc/arm_gicv3_redist: Implement GICR_INMIR0 Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 15/23] hw/intc/arm_gicv3: Implement GICD_INMIR Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 16/23] hw/intc: Enable FEAT_GICv3_NMI Feature Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 17/23] hw/intc/arm_gicv3: Add NMI handling CPU interface registers Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 18/23] hw/intc/arm_gicv3: Handle icv_nmiar1_read() for icc_nmiar1_read() Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 19/23] hw/intc/arm_gicv3: Implement NMI interrupt prioirty Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 20/23] hw/intc/arm_gicv3: Report the NMI interrupt in gicv3_cpuif_update() Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 21/23] hw/intc/arm_gicv3: Report the VNMI interrupt Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 22/23] target/arm: Add FEAT_NMI to max Jinjie Ruan via
2024-03-18  9:35 ` [RFC PATCH v8 23/23] hw/arm/virt: Add FEAT_GICv3_NMI feature support in virt GIC Jinjie Ruan via

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