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([2602:47:d490:6901:e306:567a:e0a1:341]) by smtp.gmail.com with ESMTPSA id o22-20020a17090ac09600b002638e5d2986sm9200059pjs.17.2023.08.07.15.59.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 07 Aug 2023 15:59:55 -0700 (PDT) Message-ID: Date: Mon, 7 Aug 2023 15:59:53 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH] disas/riscv: Further correction to LUI disassembly Content-Language: en-US To: Richard Bagley Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, dbarboza@ventanamicro.com References: <20230731183320.410922-1-rbagley@ventanamicro.com> <4b38596d-1db6-e03f-8b42-65c4464132ab@linaro.org> From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52e.google.com X-Spam_score_int: -38 X-Spam_score: -3.9 X-Spam_bar: --- X-Spam_report: (-3.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.809, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 8/7/23 15:01, Richard Bagley wrote: > I do apologize, but I do not understand your remark at all. Could I trouble you to spell > this out. > > In: > +                snprintf(tmp, sizeof(tmp), "%d", dec->imm >> 12 & 0xfffff); > 0xfffff is a mask which recovers the 20 bit field used to represent the immediate in the > instruction encoding. > > You seem to be responding to the syntax, which is unrelated to my change. > But I did notice it is the case that both GCC and LLVM disassemblers do not accept signed > integer arguments to LUI: > lui r1, -1 > but instead require > lui r1, 0xfffff Your language is confusing. Disassembler or assembler? A disassembler would not "accept" but "output" arguments for LUI. If the assembler rejects "lui r1, -1", that would be a bug, because the field *is* signed. For the disassembler, the field *is* signed, therefore outputting a signed value is correct. Outputting an unsigned hex value hides the fact that bit 31 is the sign. To my mind this is exactly the same as emitting a signed value for the immediate in ADDI. r~