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From: Eric Auger <eric.auger@redhat.com>
To: "Daniel P. Berrangé" <berrange@redhat.com>
Cc: eric.auger.pro@gmail.com, cohuck@redhat.com,
	qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	kvmarm@lists.linux.dev, peter.maydell@linaro.org,
	richard.henderson@linaro.org, alex.bennee@linaro.org,
	maz@kernel.org, oliver.upton@linux.dev, sebott@redhat.com,
	shameerali.kolothum.thodi@huawei.com, armbru@redhat.com,
	abologna@redhat.com, jdenemar@redhat.com, shahuang@redhat.com,
	mark.rutland@arm.com, philmd@linaro.org, pbonzini@redhat.com
Subject: Re: [RFC 18/21] arm/cpu: Introduce a customizable kvm host cpu model
Date: Fri, 25 Oct 2024 15:18:25 +0200	[thread overview]
Message-ID: <cb6c8f62-c5dc-416d-865f-fbdf96164dac@redhat.com> (raw)
In-Reply-To: <ZxuX4i9NjVRizB72@redhat.com>

Hi Daniel,

On 10/25/24 15:06, Daniel P. Berrangé wrote:
> On Fri, Oct 25, 2024 at 12:17:37PM +0200, Eric Auger wrote:
>> This new cpu model takes by default the host cpu values.
>> However it exposes uint64 SYSREG properties for writable ID reg
>> fields exposed by the host kernel. Properties are named
>> SYSREG_<REG>_<FIELD> with REG and FIELD being those used
>> in linux arch/arm64/tools/sysreg. This done by matching the
>> writable fields retrieved from the host kernel against the
>> generated description of sysregs.
>>
>> An example of invocation is:
>> -cpu custom,SYSREG_ID_AA64ISAR0_EL1_DP=0x0
>> which sets DP field of ID_AA64ISAR0_EL1 to 0.
> "SYSREG_" feels kinda redundant to repeat on every single
> feature. 

I do agree. To be honest this was mostly driven my implementation need
for cpu model expansion. Given the high number of props which are
getting exposed, I iterate on all props and having a prefix let me
return only those SYSREG props. Most probably we can get rid of the
prefix by using some generated code as well.
>
> Also, is this naming convention really the same one that users
> will see when they look at /proc/cpuinfo to view features ? It
No it is not. I do agree that the custom cpu model is very low level. It
is very well suited to test all series turning ID regs as writable but
this would require an extra layer that adapts /proc/cpuinfo feature
level to this regid/field abstraction.

In /cpu/proc you will see somethink like:
 Features    : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp
asimdhp cpuid asimdrdm lrcpc dcpop asimddp
> feels pretty low level to me ?  Naming after the registers &
> fields, would be like configuring x86 CPU features by asking
> for "SYSREG_EAX_1_ECX_20" instead of saying "vmx" which is the
> human friendly name.
agreed.
>
>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
>>
>> ---
>>
>> At the moment, the custom model does not support legacy options
>> of the host cpu model. We need to understand what we do with those
>> latter (SVE, ...). This means that related KVM ioctl are
>> not called yet.
> It will be pretty painful to have to use different feature
> terminology for different CPU models. Everything in libvirt
> assuming feature terminology varies per-arch, not per-CPU
> model.
Actually as far as I understand those regids/fields would fit all kind
of aarch64 Cortex-A CPUs. So they wouldn't vary per-CPU (I mean their
terminology. Their availability will).

Thanks

Eric
>
>
> With regards,
> Daniel



  reply	other threads:[~2024-10-25 13:19 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-25 10:17 [RFC 00/21] kvm/arm: Introduce a customizable aarch64 KVM host model Eric Auger
2024-10-25 10:17 ` [RFC 01/21] kvm: kvm_get_writable_id_regs Eric Auger
2024-10-25 10:17 ` [RFC 02/21] arm/cpu: Add sysreg definitions in cpu-sysegs.h Eric Auger
2024-10-25 10:17 ` [RFC 03/21] arm/cpu: Store aa64isar0 into the idregs arrays Eric Auger
2024-10-25 10:17 ` [RFC 04/21] arm/cpu: Store aa64isar1/2 into the idregs array Eric Auger
2024-10-25 10:17 ` [RFC 05/21] arm/cpu: Store aa64drf0/1 " Eric Auger
2024-10-25 10:17 ` [RFC 06/21] arm/cpu: Store aa64mmfr0-3 " Eric Auger
2024-10-25 10:17 ` [RFC 07/21] arm/cpu: Store aa64drf0/1 " Eric Auger
2024-10-25 10:17 ` [RFC 08/21] arm/cpu: Store aa64smfr0 " Eric Auger
2024-10-25 10:17 ` [RFC 09/21] arm/cpu: Store id_isar0-7 " Eric Auger
2024-10-25 10:17 ` [RFC 10/21] arm/cpu: Store id_mfr0/1 " Eric Auger
2024-10-25 10:17 ` [RFC 11/21] arm/cpu: Store id_dfr0/1 " Eric Auger
2024-10-25 10:17 ` [RFC 12/21] arm/cpu: Store id_mmfr0-5 " Eric Auger
2024-10-25 10:17 ` [RFC 13/21] arm/cpu: Add infra to handle generated ID register definitions Eric Auger
2024-10-25 12:55   ` Daniel P. Berrangé
2024-10-25 10:17 ` [RFC 14/21] arm/cpu: Add sysreg generation scripts Eric Auger
2024-10-25 17:05   ` Marc Zyngier
2024-11-04 13:33     ` Eric Auger
2024-10-25 10:17 ` [RFC 15/21] arm/cpu: Add generated files Eric Auger
2024-10-25 10:17 ` [RFC 16/21] arm/kvm: Allow reading all the writable ID registers Eric Auger
2024-10-25 10:17 ` [RFC 17/21] arm/kvm: write back modified ID regs to KVM Eric Auger
2024-10-25 10:17 ` [RFC 18/21] arm/cpu: Introduce a customizable kvm host cpu model Eric Auger
2024-10-25 13:06   ` Daniel P. Berrangé
2024-10-25 13:18     ` Eric Auger [this message]
2024-10-25 13:23       ` Daniel P. Berrangé
2024-10-28 16:00         ` Cornelia Huck
2024-10-28 16:15           ` Daniel P. Berrangé
2024-10-28 16:16         ` Peter Maydell
2024-10-28 16:25           ` Cornelia Huck
2024-10-28 16:35           ` Daniel P. Berrangé
2024-10-28 16:48             ` Peter Maydell
2024-10-28 16:56               ` Oliver Upton
2024-10-30 16:15                 ` Cornelia Huck
2024-10-30 16:27                   ` Daniel P. Berrangé
2024-11-04 17:09                 ` Eric Auger
2024-11-04 17:16                   ` Peter Maydell
2024-11-04 18:15                     ` Eric Auger
2024-10-28 17:04               ` Daniel P. Berrangé
2024-11-04 14:27                 ` Eric Auger
2024-11-11 14:29                   ` Cornelia Huck
2024-11-12 16:30                     ` Cornelia Huck
2024-11-12 18:28                       ` Eric Auger
2024-11-29 15:10                         ` Cornelia Huck
2024-11-29 15:42                           ` Peter Maydell
2024-11-29 15:51                             ` Cornelia Huck
2024-11-14 15:44                     ` Peter Maydell
2024-10-25 10:17 ` [RFC 19/21] virt: Allow custom vcpu model in arm virt Eric Auger
2024-10-25 10:17 ` [RFC 20/21] arm-qmp-cmds: introspection for custom model Eric Auger
2024-10-25 10:17 ` [RFC 21/21] arm/cpu-features: Document custom vcpu model Eric Auger
2024-10-25 13:13   ` Daniel P. Berrangé
2024-10-25 13:28     ` Eric Auger
2024-10-25 13:31       ` Daniel P. Berrangé
2024-10-28 16:05         ` Cornelia Huck
2024-10-28 16:09           ` Daniel P. Berrangé
2024-10-28 16:29             ` Cornelia Huck
2024-10-31 12:24               ` Kashyap Chamarthy
2024-10-31 12:59                 ` Peter Maydell
2024-11-04 14:45             ` Eric Auger
2024-11-04 14:55               ` Daniel P. Berrangé
2024-11-04 15:10                 ` Cornelia Huck
2024-11-04 15:24                   ` Daniel P. Berrangé
2024-11-04 15:48                     ` Cornelia Huck
2024-10-28 21:17   ` Kashyap Chamarthy
2024-11-04 15:34     ` Eric Auger
2024-11-04 16:30       ` Peter Maydell
2024-11-04 17:07         ` Eric Auger
2024-11-04 18:29         ` Kashyap Chamarthy
2024-10-25 12:49 ` [RFC 00/21] kvm/arm: Introduce a customizable aarch64 KVM host model Cornelia Huck
2024-10-25 14:51 ` Kashyap Chamarthy
2024-10-28 16:20   ` Cornelia Huck
2024-10-28 16:44     ` Peter Maydell
2024-11-04 15:52   ` Eric Auger

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