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From: Andrew Jeffery <andrew@codeconstruct.com.au>
To: Coco Li <lixiaoyan@google.com>
Cc: clg@kaod.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org,
	flwu@google.com,  Peter Maydell <peter.maydell@linaro.org>
Subject: Re: [PATCH v1 1/5] hw/gpio: Add property for ASPEED GPIO in 32 bits basis
Date: Mon, 13 Oct 2025 10:58:30 +1030	[thread overview]
Message-ID: <cba74db296764fd7762a18e75d76b5acb053ec4d.camel@codeconstruct.com.au> (raw)
In-Reply-To: <CADjXwjguvA6tsAjc65Fc=6S+k=pz1xry6Gd=mz6093GozuWDDQ@mail.gmail.com>

On Fri, 2025-10-03 at 10:44 -0700, Coco Li wrote:
> On Wed, Oct 1, 2025 at 4:24 PM Andrew Jeffery
> <andrew@codeconstruct.com.au> wrote:
> > 
> > On Thu, 2025-09-25 at 00:58 +0000, Coco Li wrote:
> > > From: Felix Wu <flwu@google.com>
> > > 
> > > Added 32 bits property for ASPEED GPIO. Previously it can only be access in bitwise manner.
> > > 
> > > This change gives ASPEED similar behavior as Nuvoton.
> > 
> > I don't think this has adequately addressed my request on the prior
> > series:
> > 
> > https://lore.kernel.org/all/e244fdb5d2d889674a583df8f8b9bc4bf8d476f4.camel@codeconstruct.com.au/
> > 
> > Can you please improve the commit message?
> > 
> > I don't have any particular concern with the implementation, other than
> > understanding whether it's something that's reasonable to add to begin
> > with. The "sets" and their indexes are somewhat an implementation
> > detail. Exposing them might preclude a different implementation design,
> > though I'm also not sure why we'd change at this point.
> > 
> > Andrew
> > 
> 
> Hello Andrew,
> 
> To confirm that I understand your request, I should do the following:
> 
> 1) remove the reference to Nuvoton behavior in the ASPEED patches
> (will do in follow up)
> 2) you asked for discussion of complex simulations, is the addition in
> the cover patch sufficient? Otherwise, could you elaborate on your
> comment here on what I can help provide please?

Can you please integrate the description from the cover letter into the
commit message? It's not always the case that the series cover letter
is tracked in the git history.

Andrew


  reply	other threads:[~2025-10-13  0:29 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-25  0:58 [PATCH v1 0/5] Add Aspeed GPIO test and Support Nuvoton Serial GPIO Expansion (SGPIO) device Coco Li
2025-09-25  0:58 ` [PATCH v1 1/5] hw/gpio: Add property for ASPEED GPIO in 32 bits basis Coco Li
2025-10-01 23:24   ` Andrew Jeffery
2025-10-03 17:44     ` Coco Li
2025-10-13  0:28       ` Andrew Jeffery [this message]
2025-09-25  0:58 ` [PATCH v1 2/5] tests/qtest: Add qtest for for ASPEED GPIO gpio-set property Coco Li
2025-09-25  0:58 ` [PATCH v1 3/5] hw/arm/npcm8xx.c: Add all IRQ ENUMs Coco Li
2025-09-25  1:08   ` Philippe Mathieu-Daudé
2025-09-26 21:48     ` Coco Li
2025-09-29  9:46       ` Philippe Mathieu-Daudé
2025-09-25  0:58 ` [PATCH v1 4/5] hw/gpio/npcm8xx: Implement SIOX (SPGIO) device for NPCM without input pin logic Coco Li
2025-09-25  0:58 ` [PATCH v1 5/5] hw/gpio/npcm8xx: Implement npcm sgpio device " Coco Li
2025-09-25  1:10   ` Philippe Mathieu-Daudé
2025-09-26 21:49     ` Coco Li

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