From: Richard Henderson <richard.henderson@linaro.org>
To: LIU Zhiwei <zhiwei_liu@c-sky.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Cc: "Alex Bennée" <alex.bennee@linaro.org>
Subject: Re: fpu/softfloat: a question on BFloat 16 support on QEMU
Date: Mon, 8 Jun 2020 12:34:11 -0700 [thread overview]
Message-ID: <cbaf8623-daee-a8b1-3637-3afce26e5004@linaro.org> (raw)
In-Reply-To: <ea06c0c3-465e-34a5-5427-41ae6bf583dc@c-sky.com>
On 6/8/20 5:53 AM, LIU Zhiwei wrote:
> Hi Richard,
>
> I am doing bfloat16 support on QEMU.
>
> Once I tried to reuse float32 interface, but I couldn't properly process
> rounding in some insns like fadd.
>
> What's your opinion about it? Should I expand the fpu/softfloat?
Yes, we need to expand fpu/softfloat.
You'll want something like
static const FloatFmt bfloat16_params = {
FLOAT_PARAMS(8, 7)
};
(This would be the Arm and x86 definition, anyway; hopefully risc-v is the same.)
And then add all of the other interface functions that you need to use that
parameter.
FWIW, it appears that Arm only requires:
float32_to_bfloat16
bfloat16_mul
bfloat16_add
and I could even get away with only float32_to_bfloat16, since technically
Arm's BFAdd and BFMul psuedo-code are implemented in terms of single-precision
arithmetic, followed by a round-to-odd into BFloat16.
r~
next prev parent reply other threads:[~2020-06-08 19:35 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-08 12:53 fpu/softfloat: a question on BFloat 16 support on QEMU LIU Zhiwei
2020-06-08 15:50 ` Alex Bennée
2020-06-09 3:02 ` LIU Zhiwei
2020-06-09 9:42 ` Alex Bennée
2020-06-09 11:16 ` LIU Zhiwei
2020-06-17 7:09 ` LIU Zhiwei
2020-06-26 15:58 ` Richard Henderson
2020-06-08 19:34 ` Richard Henderson [this message]
2020-06-09 3:09 ` LIU Zhiwei
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