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From: Laurent Vivier <laurent@vivier.eu>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, qemu-devel@nongnu.org
Subject: Re: [PATCH 1/2] target/m68k: don't set SSW ATC bit for physical bus errors
Date: Sun, 7 Mar 2021 21:58:07 +0100	[thread overview]
Message-ID: <cbcbf5b5-2f9e-31cf-f816-9db19d4f3479@vivier.eu> (raw)
In-Reply-To: <20210307202607.27745-2-mark.cave-ayland@ilande.co.uk>

Le 07/03/2021 à 21:26, Mark Cave-Ayland a écrit :
> If a NuBus slot doesn't contain a card, the Quadra hardware generates a physical
> bus error if the CPU attempts to access the slot address space. Both Linux and
> MacOS use a separate bus error handler during NuBus accesses in order to detect
> and recover when addressing empty slots.
> 
> According to the MC68040 users manual the ATC bit of the SSW is used to
> distinguish between ATC faults and physical bus errors. MacOS specifically checks
> the stack frame generated by a NuBus error and panics if the SSW ATC bit is set.
> 
> Update m68k_cpu_transaction_failed() so that the SSW ATC bit is not set if the
> memory API returns MEMTX_DECODE_ERROR which will be used to indicate that an
> access to an empty NuBus slot occurred.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
>  target/m68k/op_helper.c | 12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c
> index 202498deb5..59a6448296 100644
> --- a/target/m68k/op_helper.c
> +++ b/target/m68k/op_helper.c
> @@ -468,7 +468,17 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
>  
>      if (m68k_feature(env, M68K_FEATURE_M68040)) {
>          env->mmu.mmusr = 0;
> -        env->mmu.ssw |= M68K_ATC_040;
> +
> +        /*
> +         * According to the MC68040 users manual the ATC bit of the SSW is
> +         * used to distinguish between ATC faults and physical bus errors.
> +         * In the case of a bus error e.g. during nubus read from an empty
> +         * slot this bit should not be set
> +         */
> +        if (response != MEMTX_DECODE_ERROR) {
> +            env->mmu.ssw |= M68K_ATC_040;
> +        }
> +
>          /* FIXME: manage MMU table access error */
>          env->mmu.ssw &= ~M68K_TM_040;
>          if (env->sr & SR_S) { /* SUPERVISOR */
> 

Reviewed-by: Laurent Vivier <laurent@vivier.eu>


  reply	other threads:[~2021-03-07 21:03 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-07 20:26 [PATCH 0/2] target/m68k: MacOS related fixes Mark Cave-Ayland
2021-03-07 20:26 ` [PATCH 1/2] target/m68k: don't set SSW ATC bit for physical bus errors Mark Cave-Ayland
2021-03-07 20:58   ` Laurent Vivier [this message]
2021-03-07 20:26 ` [PATCH 2/2] target/m68k: add M68K_FEATURE_NO_DALIGN feature Mark Cave-Ayland
2021-03-07 20:58   ` Laurent Vivier
2021-03-08  1:03   ` Richard Henderson
2021-03-08 12:05     ` Mark Cave-Ayland

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