Re: [Qemu-devel] [PATCH RFC 1/1] arm64: add an option to turn on/off vpmu support

[Wei Huang <wei@redhat.com>]

On 07/29/2016 02:57 AM, Peter Maydell wrote:
> On 28 July 2016 at 17:38, Wei Huang <wei@redhat.com> wrote:
>> This patch adds a pmu=[on/off] option to enable/disable vpmu support
>> in guest vm. There are several reasons to justify this option. First
>> vpmu can be problematic for cross-migration between different SoC as
>> perf counters is architecture-dependent. It is more flexible to
>> have an option to turn it on/off. Secondly it matches the -cpu pmu
>> option in libivrt. This patch has been tested on both DT/ACPI modes.
> 
> 
> What particular two systems are you trying to migrate between?

One example: APM's Mustang has 5 perf counters while AMD's Seattle has 7
counters.

> In general we don't support migrating between different CPU
> types at the moment, so the PMU sholud be the same on both ends.
> 
> (If we ever do get to supporting cross-cpu-type migration
> then it will probably involve a very long and detailed command
> line to specify exactly a whole lot of things like pmu yes/no,
> number of hw breakpoints/watchpoints, and everything else that
> can differ between implementations.)
> 
> That said, I don't have any objection to making the PMU
> presence controllable (especially if we have similar
> control on x86).
> 
>> --- a/target-arm/cpu.h
>> +++ b/target-arm/cpu.h
>> @@ -579,8 +579,9 @@ struct ARMCPU {
>>      bool powered_off;
>>      /* CPU has security extension */
>>      bool has_el3;
>> -    /* CPU has PMU (Performance Monitor Unit) */
>> -    bool has_pmu;
>> +
>> +    /* CPU has vPMU (Performance Monitor Unit) support */
>> +    bool enable_pmu;
> 
> Why rename the flag? has_foo is what we use for other features,
> as you can see in the context of this bit of the patch.

I will fix it. Maybe follow the suggestion Drew's suggestion, keeping
has_pmu and add another option for turning it on/off.

> 
>>
>>      /* CPU has memory protection unit */
>>      bool has_mpu;
> 
> thanks
> -- PMM
>