From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>, qemu-devel@nongnu.org
Cc: "Weiwei Li" <liwei1518@gmail.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Bin Meng" <bmeng.cn@gmail.com>,
qemu-riscv@nongnu.org, "Palmer Dabbelt" <palmer@dabbelt.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>
Subject: Re: [PATCH-for-10.0 2/3] hw/char/riscv_htif: Explicit little-endian implementation
Date: Fri, 29 Nov 2024 14:05:18 -0300 [thread overview]
Message-ID: <cc2eb0d5-cfd7-4297-a98f-9f3f52e63204@ventanamicro.com> (raw)
In-Reply-To: <20241129154304.34946-3-philmd@linaro.org>
On 11/29/24 12:43 PM, Philippe Mathieu-Daudé wrote:
> Since our RISC-V system emulation is only built for little
> endian, the HTIF device aims to interface with little endian
> memory accesses, thus we can explicit htif_mm_ops:endianness
> being DEVICE_LITTLE_ENDIAN.
>
> In that case tswap64() is equivalent to le64_to_cpu(), as in
> "convert this 64-bit little-endian value into host cpu order".
> Replace to simplify.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> hw/char/riscv_htif.c | 11 ++++++-----
> 1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c
> index 0345088e8b3..3f84d8d6738 100644
> --- a/hw/char/riscv_htif.c
> +++ b/hw/char/riscv_htif.c
> @@ -29,7 +29,7 @@
> #include "qemu/timer.h"
> #include "qemu/error-report.h"
> #include "exec/address-spaces.h"
> -#include "exec/tswap.h"
> +#include "qemu/bswap.h"
> #include "sysemu/dma.h"
> #include "sysemu/runstate.h"
>
> @@ -212,11 +212,11 @@ static void htif_handle_tohost_write(HTIFState *s, uint64_t val_written)
> } else {
> uint64_t syscall[8];
> cpu_physical_memory_read(payload, syscall, sizeof(syscall));
> - if (tswap64(syscall[0]) == PK_SYS_WRITE &&
> - tswap64(syscall[1]) == HTIF_DEV_CONSOLE &&
> - tswap64(syscall[3]) == HTIF_CONSOLE_CMD_PUTC) {
> + if (le64_to_cpu(syscall[0]) == PK_SYS_WRITE &&
> + le64_to_cpu(syscall[1]) == HTIF_DEV_CONSOLE &&
> + le64_to_cpu(syscall[3]) == HTIF_CONSOLE_CMD_PUTC) {
> uint8_t ch;
> - cpu_physical_memory_read(tswap64(syscall[2]), &ch, 1);
> + cpu_physical_memory_read(le64_to_cpu(syscall[2]), &ch, 1);
> /*
> * XXX this blocks entire thread. Rewrite to use
> * qemu_chr_fe_write and background I/O callbacks
> @@ -324,6 +324,7 @@ static void htif_mm_write(void *opaque, hwaddr addr,
> static const MemoryRegionOps htif_mm_ops = {
> .read = htif_mm_read,
> .write = htif_mm_write,
> + .endianness = DEVICE_LITTLE_ENDIAN,
> };
>
> HTIFState *htif_mm_init(MemoryRegion *address_space, Chardev *chr,
next prev parent reply other threads:[~2024-11-29 17:06 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-29 15:43 [PATCH-for-10.0 0/3] hw/char/riscv_htif: Remove tswap64() calls Philippe Mathieu-Daudé
2024-11-29 15:43 ` [PATCH-for-10.0 1/3] MAINTAINERS: Cover RISC-V HTIF interface Philippe Mathieu-Daudé
2024-11-29 17:04 ` Daniel Henrique Barboza
2024-12-03 4:50 ` Alistair Francis
2024-11-29 15:43 ` [PATCH-for-10.0 2/3] hw/char/riscv_htif: Explicit little-endian implementation Philippe Mathieu-Daudé
2024-11-29 17:05 ` Daniel Henrique Barboza [this message]
2024-12-03 5:54 ` Alistair Francis
2024-11-29 15:43 ` [PATCH-for-10.0 3/3] hw/char/riscv_htif: Clarify MemoryRegionOps expect 32-bit accesses Philippe Mathieu-Daudé
2024-11-29 17:08 ` Daniel Henrique Barboza
2024-12-03 5:56 ` Alistair Francis
2024-12-03 6:35 ` [PATCH-for-10.0 0/3] hw/char/riscv_htif: Remove tswap64() calls Alistair Francis
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