From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.33) id 1ClePm-00035n-OV for qemu-devel@nongnu.org; Mon, 03 Jan 2005 21:27:18 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.33) id 1ClePl-00035E-ER for qemu-devel@nongnu.org; Mon, 03 Jan 2005 21:27:17 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.33) id 1ClePl-00034t-7U for qemu-devel@nongnu.org; Mon, 03 Jan 2005 21:27:17 -0500 Received: from [64.233.184.196] (helo=wproxy.gmail.com) by monty-python.gnu.org with esmtp (Exim 4.34) id 1CleED-0006A9-4n for qemu-devel@nongnu.org; Mon, 03 Jan 2005 21:15:21 -0500 Received: by wproxy.gmail.com with SMTP id 68so612966wri for ; Mon, 03 Jan 2005 18:15:20 -0800 (PST) Message-ID: Date: Mon, 3 Jan 2005 21:15:20 -0500 From: Karl Magdsick Subject: Re: [Qemu-devel] x86_64 target In-Reply-To: <41D9E0BB.1070202@bellard.org> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit References: <41D9E0BB.1070202@bellard.org> Reply-To: Karl Magdsick , qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Wohoo! Of course, AMD changed the architecture name from x86-64 to amd64 and Intel has their own 64-bit implementation that overlaps the amd64 instruction set, called EMT (Extended Memory Technology, not to be confused with Intel's ESMA/PSE36 36-bit technology). For Linux, x86_64 was used instead of x86-64 because the dash was used as a seperator in Linux naming conventions and Linus opted not to migrate architecture names when AMD changed the name to amd64. Some Linux distributions name their distributions amd64 after the official architecture name and some name them x86_64 or x86-64 after the Linux kernel/historical architecture name. The EMT Xeons implement all of the amd64 instructions that were in an early release of the instruction set reference, so I think a single 64-bit Linux kernel can boot and run on both amd64 and EMT Xeon chips. The EMT Xeons may implement all of the instructions announced before the name switch to amd64, but I'm not sure exactly when the name change occured and when the newer instructions were announced. Am I correct in assuming that the QEMU x86_64 is intended to track the amd64 instruction set? If you intend to track the EMT instruction set and emulate EMT Xeons, you may have to implement ESMA/PSE36 36-bit addressing. Are you implementing the 40-bit internal addressing scheme used in current generation amd64 chips? -Karl On Tue, 04 Jan 2005 01:18:03 +0100, Fabrice Bellard wrote: > Hi, > > As a small gift for this new year, here is an initial implementation of > the x86_64 target in QEMU. It is a "work in progress" as usual, but it > works enough to boot an x86_64 Linux kernel (I used the one available at > http://bochs.sourceforge.net/guestos/linux.x86-64.bzImage). > > Although the x86_64 target works correctly on 32 bit hosts, it is > designed to have the best performances on 64 bit hosts, such as x86_64 > or ppc64. The current speed is poor relatively to the i386 emulation > because I did not enable register usage on 64 bit hosts (no time to test > it yet). > > The biggest missing part is a full implementation of SSE - I only added > the minimal subset for the Linux kernel. I won't work again on the > x86_64 target in the near future (as I said earlier most of my time is > dedicated on improving the x86 on x86 speed), but anyone is free to > submit patches. > > Fabrice. > > _______________________________________________ > Qemu-devel mailing list > Qemu-devel@nongnu.org > http://lists.nongnu.org/mailman/listinfo/qemu-devel >