From: Claudio Fontana <cfontana@suse.de>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>,
qemu-devel <qemu-devel@nongnu.org>
Subject: Re: [RFC v2 21/24] target/arm: cpu64: wrap TCG-only parts of aarch64_cpu_dump_state
Date: Tue, 2 Mar 2021 19:01:51 +0100 [thread overview]
Message-ID: <cd93478c-00d3-c6b7-1529-7e52c33b2446@suse.de> (raw)
In-Reply-To: <6d8ff697-aff9-0f56-6f68-1deb428e0ee5@linaro.org>
On 3/2/21 5:56 PM, Richard Henderson wrote:
> On 3/1/21 8:49 AM, Claudio Fontana wrote:
>> - if (cpu_isar_feature(aa64_sve, cpu) && sve_exception_el(env, el) == 0) {
>> + if (tcg_enabled() &&
>> + cpu_isar_feature(aa64_sve, cpu) && sve_exception_el(env, el) == 0) {
>
> There's nothing tcg-only about this -- kvm supports sve.
>
> r~
>
Indeed, on my box I am using probably just the cpu_isar_feature check fails.
This is basically an open question: do we need an sve_exception_el helper stub that always returns 0?
Thanks,
Claudio
next prev parent reply other threads:[~2021-03-02 18:37 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20210301164936.19446-1-cfontana@suse.de>
[not found] ` <20210301164936.19446-5-cfontana@suse.de>
2021-03-01 18:16 ` [RFC v2 04/24] target/arm: move psci.c into tcg/sysemu/ Richard Henderson
2021-03-02 10:38 ` Claudio Fontana
2021-03-02 11:54 ` Peter Maydell
2021-03-02 18:36 ` Claudio Fontana
[not found] ` <20210301164936.19446-8-cfontana@suse.de>
2021-03-01 18:49 ` [RFC v2 07/24] target/arm: move physical address translation to new modules Richard Henderson
2021-03-02 10:58 ` Claudio Fontana
[not found] ` <20210301164936.19446-9-cfontana@suse.de>
2021-03-01 22:22 ` [RFC v2 08/24] target/arm: split cpregs from tcg/helper.c Richard Henderson
[not found] ` <20210301164936.19446-11-cfontana@suse.de>
2021-03-02 3:36 ` [RFC v2 10/24] target/arm: only perform TCG cpu and machine inits if tcg enabled Richard Henderson
2021-03-02 7:58 ` Claudio Fontana
[not found] ` <20210301164936.19446-12-cfontana@suse.de>
2021-03-02 3:41 ` [RFC v2 11/24] target/arm: kvm: add stubs for some helpers Richard Henderson
[not found] ` <20210301164936.19446-13-cfontana@suse.de>
2021-03-02 4:02 ` [RFC v2 12/24] target/arm: move cpsr_read, cpsr_write to cpu_common Richard Henderson
2021-03-02 8:11 ` Claudio Fontana
[not found] ` <20210301164936.19446-14-cfontana@suse.de>
2021-03-02 4:07 ` [RFC v2 13/24] target/arm: add temporary stub for arm_rebuild_hflags Richard Henderson
[not found] ` <20210301164936.19446-15-cfontana@suse.de>
2021-03-02 4:24 ` [RFC v2 14/24] target/arm: split vfp state setting from tcg helpers Richard Henderson
2021-03-02 8:18 ` Claudio Fontana
[not found] ` <20210301164936.19446-16-cfontana@suse.de>
2021-03-02 4:35 ` [RFC v2 15/24] target/arm: move arm_mmu_idx* to get-phys-addr Richard Henderson
2021-03-02 12:16 ` Claudio Fontana
[not found] ` <20210301164936.19446-17-cfontana@suse.de>
2021-03-02 4:41 ` [RFC v2 16/24] target/arm: move sve_zcr_len_for_el to common_cpu Richard Henderson
2021-03-03 8:17 ` Claudio Fontana
[not found] ` <20210301164936.19446-19-cfontana@suse.de>
2021-03-02 5:43 ` [RFC v2 18/24] target/arm: move arm_cpu_list " Richard Henderson
[not found] ` <20210301164936.19446-6-cfontana@suse.de>
2021-03-02 5:50 ` [RFC v2 05/24] target/arm: wrap arm_cpu_exec_interrupt in CONFIG_TCG Richard Henderson
2021-03-02 8:00 ` Claudio Fontana
[not found] ` <20210301164936.19446-7-cfontana@suse.de>
2021-03-02 6:17 ` [RFC v2 06/24] target/arm: split off cpu-sysemu.c Richard Henderson
2021-03-02 8:06 ` Claudio Fontana
[not found] ` <20210301164936.19446-20-cfontana@suse.de>
2021-03-02 6:23 ` [RFC v2 19/24] target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code Richard Henderson
2021-03-02 11:58 ` Claudio Fontana
2021-03-02 12:11 ` Peter Maydell
[not found] ` <20210301164936.19446-25-cfontana@suse.de>
2021-03-02 7:40 ` [RFC v2 24/24] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled() Claudio Fontana
[not found] ` <20210301164936.19446-22-cfontana@suse.de>
2021-03-02 16:56 ` [RFC v2 21/24] target/arm: cpu64: wrap TCG-only parts of aarch64_cpu_dump_state Richard Henderson
2021-03-02 18:01 ` Claudio Fontana [this message]
2021-03-02 18:49 ` Richard Henderson
[not found] ` <20210301164936.19446-23-cfontana@suse.de>
2021-03-02 16:58 ` [RFC v2 22/24] target/arm: cpu64: wrap arm cpregs with CONFIG_TCG Richard Henderson
2021-03-02 18:06 ` Claudio Fontana
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