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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: sw@weilnetz.de
Subject: Re: [PATCH 2/2] tcg/tci: Adjust call-clobbered regs for int128_t
Date: Wed, 7 Jun 2023 09:44:06 +0200	[thread overview]
Message-ID: <cd95d2c3-6f67-cf10-8cfe-6b344e7eebde@linaro.org> (raw)
In-Reply-To: <20230607054654.622010-3-richard.henderson@linaro.org>

On 7/6/23 07:46, Richard Henderson wrote:
> We require either 2 or 4 registers to hold int128_t.
> Failure to do so results in a register allocation assert.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   tcg/tci/tcg-target.c.inc | 9 +++++----
>   1 file changed, 5 insertions(+), 4 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



  reply	other threads:[~2023-06-07  7:44 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-07  5:46 [PATCH 0/2] tcg/tci: Two regression fixes Richard Henderson
2023-06-07  5:46 ` [PATCH 1/2] tcg/tci: Adjust passing of MemOpIdx Richard Henderson
2023-06-07  5:46 ` [PATCH 2/2] tcg/tci: Adjust call-clobbered regs for int128_t Richard Henderson
2023-06-07  7:44   ` Philippe Mathieu-Daudé [this message]
2023-06-07  5:53 ` [PATCH 0/2] tcg/tci: Two regression fixes Richard Henderson

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