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From: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <ce17e6a5-7e22-a73e-36f5-89c81bcb60a6@linaro.org>
Date: Mon, 5 Feb 2018 06:01:00 -0800
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Subject: Re: [Qemu-devel] [PATCH v4 06/22] RISC-V FPU Support
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To: Michael Clark <mjc@sifive.com>, qemu-devel@nongnu.org
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>, Palmer Dabbelt <palmer@sifive.com>, Sagar Karandikar <sagark@eecs.berkeley.edu>, RISC-V Patches <patches@groups.riscv.org>

On 02/04/2018 10:22 PM, Michael Clark wrote:
> +uint64_t helper_fmsub_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
> +                        uint64_t frs3)
> +{
> +    return float32_muladd(frs1, frs2, frs3 ^ (uint32_t)INT32_MIN, 0,
> +                          &env->fp_status);

Missing the requested change to use float32_chs or float_muladd_negate_product
et al throughout the fma family of helpers.

Probably float_muladd_* since you've re-enabled default_nan_mode.


r~