From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Stefano Stabellini <sstabellini@kernel.org>, patches@linaro.org
Subject: Re: [Qemu-devel] [PATCH for-2.11] target/arm: Report GICv3 sysregs present in ID registers if needed
Date: Wed, 8 Nov 2017 10:26:45 +0100 [thread overview]
Message-ID: <ce4114ab-c17d-9797-5892-dc5e130fc0d6@linaro.org> (raw)
In-Reply-To: <1510066898-3725-1-git-send-email-peter.maydell@linaro.org>
On 11/07/2017 04:01 PM, Peter Maydell wrote:
> The CPU ID registers ID_AA64PFR0_EL1, ID_PFR1_EL1 and ID_PFR1
> have a field for reporting presence of GICv3 system registers.
> We need to report this field correctly in order for Xen to
> work as a guest inside QEMU emulation. We mustn't incorrectly
> claim the sysregs exist when they don't, though, or Linux will
> crash.
>
> Unfortunately the way we've designed the GICv3 emulation in QEMU
> puts the system registers as part of the GICv3 device, which
> may be created after the CPU proper has been realized. This
> means that we don't know at the point when we define the ID
> registers what the correct value is. Handle this by switching
> them to calling a function at runtime to read the value, where
> we can fill in the GIC field appropriately.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2017-11-08 9:26 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-07 15:01 [Qemu-devel] [PATCH for-2.11] target/arm: Report GICv3 sysregs present in ID registers if needed Peter Maydell
2017-11-07 18:04 ` Stefano Stabellini
2017-11-08 9:26 ` Richard Henderson [this message]
2017-11-15 1:14 ` Alistair Francis
2017-11-15 11:57 ` Peter Maydell
2017-11-16 17:03 ` Alistair Francis
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