* [PATCH] target/m68k: Remove pointless @cpu_halted TCGv
@ 2025-09-25 1:24 Philippe Mathieu-Daudé
2025-09-25 18:35 ` Richard Henderson
2025-10-07 8:20 ` Philippe Mathieu-Daudé
0 siblings, 2 replies; 3+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-09-25 1:24 UTC (permalink / raw)
To: qemu-devel; +Cc: Laurent Vivier, Philippe Mathieu-Daudé
Avoid registering a TCGv to write the generic CPUState::halted
field. Access it directly via @env in both STOP / HALT opcodes.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
Based-on: <20250924171308.53036-1-philmd@linaro.org>
---
target/m68k/translate.c | 11 ++++-------
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 0cee54f4900..eb1ba150745 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -44,8 +44,6 @@
#undef DEFO32
#undef DEFO64
-static TCGv_i32 cpu_halted;
-
static char cpu_reg_names[2 * 8 * 3 + 5 * 4];
static TCGv cpu_dregs[8];
static TCGv cpu_aregs[8];
@@ -77,9 +75,6 @@ void m68k_tcg_init(void)
#undef DEFO32
#undef DEFO64
- cpu_halted = tcg_global_mem_new_i32(tcg_env,
- -offsetof(M68kCPU, env) +
- offsetof(CPUState, halted), "HALTED");
p = cpu_reg_names;
for (i = 0; i < 8; i++) {
sprintf(p, "D%d", i);
@@ -4506,7 +4501,8 @@ DISAS_INSN(halt)
gen_exception(s, s->pc, EXCP_SEMIHOSTING);
return;
}
- tcg_gen_movi_i32(cpu_halted, 1);
+ tcg_gen_st_i32(tcg_constant_i32(1), tcg_env,
+ offsetof(CPUState, halted) - offsetof(M68kCPU, env));
gen_exception(s, s->pc, EXCP_HLT);
}
@@ -4522,7 +4518,8 @@ DISAS_INSN(stop)
ext = read_im16(env, s);
gen_set_sr_im(s, ext, 0);
- tcg_gen_movi_i32(cpu_halted, 1);
+ tcg_gen_st_i32(tcg_constant_i32(1), tcg_env,
+ offsetof(CPUState, halted) - offsetof(M68kCPU, env));
gen_exception(s, s->pc, EXCP_HLT);
}
--
2.51.0
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] target/m68k: Remove pointless @cpu_halted TCGv
2025-09-25 1:24 [PATCH] target/m68k: Remove pointless @cpu_halted TCGv Philippe Mathieu-Daudé
@ 2025-09-25 18:35 ` Richard Henderson
2025-10-07 8:20 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 3+ messages in thread
From: Richard Henderson @ 2025-09-25 18:35 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel; +Cc: Laurent Vivier
On 9/24/25 18:24, Philippe Mathieu-Daudé wrote:
> Avoid registering a TCGv to write the generic CPUState::halted
> field. Access it directly via @env in both STOP / HALT opcodes.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> Based-on: <20250924171308.53036-1-philmd@linaro.org>
> ---
> target/m68k/translate.c | 11 ++++-------
> 1 file changed, 4 insertions(+), 7 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
>
> diff --git a/target/m68k/translate.c b/target/m68k/translate.c
> index 0cee54f4900..eb1ba150745 100644
> --- a/target/m68k/translate.c
> +++ b/target/m68k/translate.c
> @@ -44,8 +44,6 @@
> #undef DEFO32
> #undef DEFO64
>
> -static TCGv_i32 cpu_halted;
> -
> static char cpu_reg_names[2 * 8 * 3 + 5 * 4];
> static TCGv cpu_dregs[8];
> static TCGv cpu_aregs[8];
> @@ -77,9 +75,6 @@ void m68k_tcg_init(void)
> #undef DEFO32
> #undef DEFO64
>
> - cpu_halted = tcg_global_mem_new_i32(tcg_env,
> - -offsetof(M68kCPU, env) +
> - offsetof(CPUState, halted), "HALTED");
> p = cpu_reg_names;
> for (i = 0; i < 8; i++) {
> sprintf(p, "D%d", i);
> @@ -4506,7 +4501,8 @@ DISAS_INSN(halt)
> gen_exception(s, s->pc, EXCP_SEMIHOSTING);
> return;
> }
> - tcg_gen_movi_i32(cpu_halted, 1);
> + tcg_gen_st_i32(tcg_constant_i32(1), tcg_env,
> + offsetof(CPUState, halted) - offsetof(M68kCPU, env));
> gen_exception(s, s->pc, EXCP_HLT);
> }
>
> @@ -4522,7 +4518,8 @@ DISAS_INSN(stop)
> ext = read_im16(env, s);
>
> gen_set_sr_im(s, ext, 0);
> - tcg_gen_movi_i32(cpu_halted, 1);
> + tcg_gen_st_i32(tcg_constant_i32(1), tcg_env,
> + offsetof(CPUState, halted) - offsetof(M68kCPU, env));
> gen_exception(s, s->pc, EXCP_HLT);
> }
>
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] target/m68k: Remove pointless @cpu_halted TCGv
2025-09-25 1:24 [PATCH] target/m68k: Remove pointless @cpu_halted TCGv Philippe Mathieu-Daudé
2025-09-25 18:35 ` Richard Henderson
@ 2025-10-07 8:20 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 3+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-10-07 8:20 UTC (permalink / raw)
To: qemu-devel; +Cc: Laurent Vivier
On 25/9/25 03:24, Philippe Mathieu-Daudé wrote:
> Avoid registering a TCGv to write the generic CPUState::halted
> field. Access it directly via @env in both STOP / HALT opcodes.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> Based-on: <20250924171308.53036-1-philmd@linaro.org>
> ---
> target/m68k/translate.c | 11 ++++-------
> 1 file changed, 4 insertions(+), 7 deletions(-)
Queued, thanks.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2025-09-25 1:24 [PATCH] target/m68k: Remove pointless @cpu_halted TCGv Philippe Mathieu-Daudé
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2025-10-07 8:20 ` Philippe Mathieu-Daudé
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