From: WANG Xuerui <i.qemu@xen0n.name>
To: Xiaojuan Yang <yangxiaojuan@loongson.cn>, qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk, richard.henderson@linaro.org,
philmd@redhat.com, Song Gao <gaosong@loongson.cn>
Subject: Re: [RFC PATCH v4 03/30] target/loongarch: Add basic vmstate description of CPU.
Date: Sun, 9 Jan 2022 17:25:46 +0800 [thread overview]
Message-ID: <ce7313c6-0376-2f43-21bf-dc8a864baa18@xen0n.name> (raw)
In-Reply-To: <20220108091419.2027710-4-yangxiaojuan@loongson.cn>
On 1/8/22 17:13, Xiaojuan Yang wrote:
> This patch introduce vmstate_loongarch_cpu
Again, pointless commit message.
> Signed-off-by: Xiaojuan Yang<yangxiaojuan@loongson.cn>
> Signed-off-by: Song Gao<gaosong@loongson.cn>
> Reviewed-by: Richard Henderson<richard.henderson@linaro.org>
> ---
> target/loongarch/cpu.c | 3 ++
> target/loongarch/internals.h | 4 ++
> target/loongarch/machine.c | 84 ++++++++++++++++++++++++++++++++++++
> target/loongarch/meson.build | 6 +++
> 4 files changed, 97 insertions(+)
> create mode 100644 target/loongarch/machine.c
>
> diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
> index ed03ec2986..6e3dc5e6fa 100644
> --- a/target/loongarch/cpu.c
> +++ b/target/loongarch/cpu.c
> @@ -320,6 +320,9 @@ static void loongarch_cpu_class_init(ObjectClass *c, void *data)
> cc->has_work = loongarch_cpu_has_work;
> cc->dump_state = loongarch_cpu_dump_state;
> cc->set_pc = loongarch_cpu_set_pc;
> +#ifndef CONFIG_USER_ONLY
> + dc->vmsd = &vmstate_loongarch_cpu;
> +#endif
> cc->disas_set_info = loongarch_cpu_disas_set_info;
> #ifdef CONFIG_TCG
> cc->tcg_ops = &loongarch_tcg_ops;
> diff --git a/target/loongarch/internals.h b/target/loongarch/internals.h
> index 774a87ec80..c8e6f7012c 100644
> --- a/target/loongarch/internals.h
> +++ b/target/loongarch/internals.h
> @@ -25,4 +25,8 @@ const char *loongarch_exception_name(int32_t exception);
>
> void restore_fp_status(CPULoongArchState *env);
>
> +#ifndef CONFIG_USER_ONLY
> +extern const VMStateDescription vmstate_loongarch_cpu;
> +#endif
> +
> #endif
> diff --git a/target/loongarch/machine.c b/target/loongarch/machine.c
> new file mode 100644
> index 0000000000..b9effe6db2
> --- /dev/null
> +++ b/target/loongarch/machine.c
> @@ -0,0 +1,84 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +/*
> + * QEMU LoongArch machine State
Use consistent casing; "machine state" or "Machine State".
> + *
> + * Copyright (c) 2021 Loongson Technology Corporation Limited
> + */
> +
> +#include "qemu/osdep.h"
> +#include "cpu.h"
> +#include "migration/cpu.h"
> +
> +/* LoongArch CPU state */
> +
> +const VMStateDescription vmstate_loongarch_cpu = {
> + .name = "cpu",
> + .version_id = 0,
> + .minimum_version_id = 0,
> + .fields = (VMStateField[]) {
> +
> + VMSTATE_UINTTL_ARRAY(env.gpr, LoongArchCPU, 32),
> + VMSTATE_UINTTL(env.pc, LoongArchCPU),
> + VMSTATE_UINT64_ARRAY(env.fpr, LoongArchCPU, 32),
> + VMSTATE_UINT32(env.fcsr0, LoongArchCPU),
> +
> + /* Remaining CSR registers */
"Remaining CSRs"
> + VMSTATE_UINT64(env.CSR_CRMD, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_PRMD, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_EUEN, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_MISC, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_ECFG, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_ESTAT, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_ERA, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_BADV, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_BADI, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_EENTRY, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_TLBIDX, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_TLBEHI, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_TLBELO0, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_TLBELO1, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_ASID, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_PGDL, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_PGDH, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_PGD, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_PWCL, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_PWCH, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_STLBPS, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_RVACFG, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_CPUID, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_PRCFG1, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_PRCFG2, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_PRCFG3, LoongArchCPU),
> + VMSTATE_UINT64_ARRAY(env.CSR_SAVE, LoongArchCPU, 16),
> + VMSTATE_UINT64(env.CSR_TID, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_TCFG, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_TVAL, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_CNTC, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_TICLR, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_LLBCTL, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_IMPCTL1, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_IMPCTL2, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_TLBRENTRY, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_TLBRBADV, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_TLBRERA, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_TLBRSAVE, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_TLBRELO0, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_TLBRELO1, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_TLBREHI, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_TLBRPRMD, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_MERRCTL, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_MERRINFO1, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_MERRINFO2, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_MERRENTRY, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_MERRERA, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_MERRSAVE, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_CTAG, LoongArchCPU),
> + VMSTATE_UINT64_ARRAY(env.CSR_DMW, LoongArchCPU, 4),
> + /* debug */
"debug registers"
> + VMSTATE_UINT64(env.CSR_DBG, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_DERA, LoongArchCPU),
> + VMSTATE_UINT64(env.CSR_DSAVE, LoongArchCPU),
> +
> + VMSTATE_END_OF_LIST()
> + },
> +};
> diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build
> index bcb076e55f..103f36ee15 100644
> --- a/target/loongarch/meson.build
> +++ b/target/loongarch/meson.build
> @@ -14,6 +14,12 @@ loongarch_tcg_ss.add(files(
> ))
> loongarch_tcg_ss.add(zlib)
>
> +loongarch_softmmu_ss = ss.source_set()
> +loongarch_softmmu_ss.add(files(
> + 'machine.c',
> +))
> +
> loongarch_ss.add_all(when: 'CONFIG_TCG', if_true: [loongarch_tcg_ss])
>
> target_arch += {'loongarch': loongarch_ss}
> +target_softmmu_arch += {'loongarch': loongarch_softmmu_ss}
next prev parent reply other threads:[~2022-01-09 9:51 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-08 9:13 [RFC PATCH v4 00/30] Add LoongArch softmmu support Xiaojuan Yang
2022-01-08 9:13 ` [RFC PATCH v4 01/30] target/loongarch: Update README Xiaojuan Yang
2022-01-09 9:25 ` WANG Xuerui
2022-01-15 12:42 ` Mark Cave-Ayland
2022-01-08 9:13 ` [RFC PATCH v4 02/30] target/loongarch: Add CSR registers definition Xiaojuan Yang
2022-01-09 9:25 ` WANG Xuerui
2022-01-08 9:13 ` [RFC PATCH v4 03/30] target/loongarch: Add basic vmstate description of CPU Xiaojuan Yang
2022-01-09 9:25 ` WANG Xuerui [this message]
2022-01-15 12:52 ` Mark Cave-Ayland
2022-01-27 10:01 ` yangxiaojuan
2022-01-08 9:13 ` [RFC PATCH v4 04/30] target/loongarch: Implement qmp_query_cpu_definitions() Xiaojuan Yang
2022-01-09 9:25 ` WANG Xuerui
2022-01-08 9:13 ` [RFC PATCH v4 05/30] target/loongarch: Add constant timer support Xiaojuan Yang
2022-01-09 9:25 ` WANG Xuerui
2022-01-15 13:02 ` Mark Cave-Ayland
2022-01-08 9:13 ` [RFC PATCH v4 06/30] target/loongarch: Add MMU support for LoongArch CPU Xiaojuan Yang
2022-01-09 9:25 ` WANG Xuerui
2022-01-08 9:13 ` [RFC PATCH v4 07/30] target/loongarch: Add LoongArch CSR instruction Xiaojuan Yang
2022-01-09 9:25 ` WANG Xuerui
2022-01-08 9:13 ` [RFC PATCH v4 08/30] target/loongarch: Add LoongArch IOCSR instruction Xiaojuan Yang
2022-01-09 9:25 ` WANG Xuerui
2022-01-08 9:13 ` [RFC PATCH v4 09/30] target/loongarch: Add TLB instruction support Xiaojuan Yang
2022-01-09 9:26 ` WANG Xuerui
2022-01-08 9:13 ` [RFC PATCH v4 10/30] target/loongarch: Add other core instructions support Xiaojuan Yang
2022-01-09 9:26 ` WANG Xuerui
2022-01-08 9:14 ` [RFC PATCH v4 11/30] target/loongarch: Add LoongArch interrupt and exception handle Xiaojuan Yang
2022-01-09 9:26 ` WANG Xuerui
2022-01-08 9:14 ` [RFC PATCH v4 12/30] target/loongarch: Add timer related instructions support Xiaojuan Yang
2022-01-09 9:26 ` WANG Xuerui
2022-01-08 9:14 ` [RFC PATCH v4 13/30] target/loongarch: Add gdb support Xiaojuan Yang
2022-01-09 9:26 ` WANG Xuerui
2022-01-08 9:14 ` [RFC PATCH v4 14/30] hw/pci-host: Add ls7a1000 PCIe Host bridge support for Loongson3 Platform Xiaojuan Yang
2022-01-08 9:14 ` [RFC PATCH v4 15/30] hw/loongarch: Add support loongson3-ls7a machine type Xiaojuan Yang
2022-01-15 13:35 ` Mark Cave-Ayland
2022-01-08 9:14 ` [RFC PATCH v4 16/30] hw/loongarch: Add LoongArch cpu interrupt support(CPUINTC) Xiaojuan Yang
2022-01-08 9:14 ` [RFC PATCH v4 17/30] hw/loongarch: Add LoongArch ipi interrupt support(IPI) Xiaojuan Yang
2022-01-08 9:14 ` [RFC PATCH v4 18/30] hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC) Xiaojuan Yang
2022-01-15 13:41 ` Mark Cave-Ayland
2022-01-08 9:14 ` [RFC PATCH v4 19/30] hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI) Xiaojuan Yang
2022-01-08 9:14 ` [RFC PATCH v4 20/30] hw/intc: Add LoongArch extioi interrupt controller(EIOINTC) Xiaojuan Yang
2022-01-15 13:49 ` Mark Cave-Ayland
2022-01-08 9:14 ` [RFC PATCH v4 21/30] hw/loongarch: Add irq hierarchy for the system Xiaojuan Yang
2022-01-15 14:00 ` Mark Cave-Ayland
2022-01-08 9:14 ` [RFC PATCH v4 22/30] Enable common virtio pci support for LoongArch Xiaojuan Yang
2022-01-08 9:14 ` [RFC PATCH v4 23/30] hw/loongarch: Add some devices support for 3A5000 Xiaojuan Yang
2022-01-08 9:14 ` [RFC PATCH v4 24/30] hw/loongarch: Add LoongArch ls7a rtc device support Xiaojuan Yang
2022-01-08 9:14 ` [RFC PATCH v4 25/30] hw/loongarch: Add default bios startup support Xiaojuan Yang
2022-01-08 9:14 ` [RFC PATCH v4 26/30] hw/loongarch: Add -kernel and -initrd options support Xiaojuan Yang
2022-01-08 9:14 ` [RFC PATCH v4 27/30] hw/loongarch: Add LoongArch smbios support Xiaojuan Yang
2022-01-08 9:14 ` [RFC PATCH v4 28/30] hw/loongarch: Add LoongArch acpi support Xiaojuan Yang
2022-01-08 9:14 ` [RFC PATCH v4 29/30] hw/loongarch: Add fdt support Xiaojuan Yang
2022-01-08 9:14 ` [RFC PATCH v4 30/30] tests/tcg/loongarch64: Add hello/memory test in loongarch64 system Xiaojuan Yang
2022-01-09 9:26 ` [RFC PATCH v4 00/30] Add LoongArch softmmu support WANG Xuerui
2022-01-10 2:42 ` yangxiaojuan
2022-01-15 14:11 ` Mark Cave-Ayland
2022-01-17 1:49 ` yangxiaojuan
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