Re: [PULL 11/13] tests/functional: Test SD cards in SPI mode (using sifive_u machine)

[Pierrick Bouvier <pierrick.bouvier@linaro.org>]

Hi,

On 8/5/25 10:31 AM, Philippe Mathieu-Daudé wrote:
> Add a test which uses the sifive_u machine to boot a Linux
> kernel from a SD card connected via a SPI interface.
> 
> Inspired from the command provided in:
> - https://lore.kernel.org/qemu-devel/94b2c5bf-53d0-4c74-8264-f3021916f38c@roeck-us.net/
> - https://lore.kernel.org/qemu-devel/840016d0-0d49-4ef4-8372-b62b3bcd0ac6@codethink.co.uk/
> 
> Inspired-by: Guenter Roeck <linux@roeck-us.net>
> Inspired-by: Ben Dooks <ben.dooks@codethink.co.uk>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Acked-by: Richard Henderson <richard.henderson@linaro.org>
> Message-Id: <20250804133406.17456-12-philmd@linaro.org>
> ---
>   MAINTAINERS                               |  1 +
>   tests/functional/meson.build              |  1 +
>   tests/functional/test_riscv64_sifive_u.py | 51 +++++++++++++++++++++++
>   3 files changed, 53 insertions(+)
>   create mode 100755 tests/functional/test_riscv64_sifive_u.py
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 28cea342718..a07086ed762 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1695,6 +1695,7 @@ S: Supported
>   F: docs/system/riscv/sifive_u.rst
>   F: hw/*/*sifive*.c
>   F: include/hw/*/*sifive*.h
> +F: tests/functional/test_riscv64_sifive_u.py
>   
>   AMD Microblaze-V Generic Board
>   M: Sai Pavan Boddu <sai.pavan.boddu@amd.com>
> diff --git a/tests/functional/meson.build b/tests/functional/meson.build
> index ecf965adc6c..311c6f18065 100644
> --- a/tests/functional/meson.build
> +++ b/tests/functional/meson.build
> @@ -274,6 +274,7 @@ tests_riscv64_system_quick = [
>   ]
>   
>   tests_riscv64_system_thorough = [
> +  'riscv64_sifive_u',
>     'riscv64_tuxrun',
>   ]
>   
> diff --git a/tests/functional/test_riscv64_sifive_u.py b/tests/functional/test_riscv64_sifive_u.py
> new file mode 100755
> index 00000000000..dc4cb8a4a96
> --- /dev/null
> +++ b/tests/functional/test_riscv64_sifive_u.py
> @@ -0,0 +1,51 @@
> +#!/usr/bin/env python3
> +#
> +# Functional test that boots a Linux kernel on a Sifive U machine
> +# and checks the console
> +#
> +# Copyright (c) Linaro Ltd.
> +#
> +# Author:
> +#  Philippe Mathieu-Daudé
> +#
> +# SPDX-License-Identifier: GPL-2.0-or-later
> +
> +import os
> +
> +from qemu_test import Asset, LinuxKernelTest
> +from qemu_test import skipIfMissingCommands
> +
> +
> +class SifiveU(LinuxKernelTest):
> +
> +    ASSET_KERNEL = Asset(
> +        'https://storage.tuxboot.com/buildroot/20241119/riscv64/Image',
> +        '2bd8132a3bf21570290042324fff48c987f42f2a00c08de979f43f0662ebadba')
> +    ASSET_ROOTFS = Asset(
> +        ('https://github.com/groeck/linux-build-test/raw/'
> +         '9819da19e6eef291686fdd7b029ea00e764dc62f/rootfs/riscv64/'
> +         'rootfs.ext2.gz'),
> +        'b6ed95610310b7956f9bf20c4c9c0c05fea647900df441da9dfe767d24e8b28b')
> +
> +    def test_riscv64_sifive_u_mmc_spi(self):
> +        self.set_machine('sifive_u')
> +        kernel_path = self.ASSET_KERNEL.fetch()
> +        rootfs_path = self.uncompress(self.ASSET_ROOTFS)
> +
> +        self.vm.set_console()
> +        kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
> +                               'root=/dev/mmcblk0 rootwait '
> +                               'earlycon=sbi console=ttySIF0 '
> +                               'panic=-1 noreboot')
> +        self.vm.add_args('-kernel', kernel_path,
> +                         '-drive', f'file={rootfs_path},if=sd,format=raw',
> +                         '-append', kernel_command_line,
> +                         '-no-reboot')
> +        self.vm.launch()
> +        self.wait_for_console_pattern('Boot successful.')
> +
> +        os.remove(rootfs_path)
> +
> +
> +if __name__ == '__main__':
> +    LinuxKernelTest.main()

This new test triggers a usban error, which seems unrelated to what is 
tested.

tests/functional/riscv64/test_riscv64_sifive_u.SifiveU.test_riscv64_sifive_u_mmc_spi/default.log
../net/checksum.c:78:23: runtime error: member access within misaligned 
address 0x63300000ff71 for type 'struct eth_header', which requires 2 
byte alignment
0x63300000ff71: note: pointer points here
  00 00 00  00 33 33 00 00 00 16 52  54 00 12 34 56 86 dd 60  00 00 00 
00 24 00 01 00  00 00 00 00 00
               ^
     #0 0x56492d505aeb in net_checksum_calculate ../net/checksum.c:78
     #1 0x56492cde3b75 in gem_transmit ../hw/net/cadence_gem.c:1386
     #2 0x56492cde3b75 in gem_write ../hw/net/cadence_gem.c:1639
     #3 0x56492d35ba8d in memory_region_write_accessor 
../system/memory.c:490
     #4 0x56492d368449 in access_with_adjusted_size ../system/memory.c:566
     #5 0x56492d36de3c in memory_region_dispatch_write 
../system/memory.c:1553
     #6 0x56492d39fb22 in flatview_write_continue_step 
../system/physmem.c:2972
     #7 0x56492d3a007c in flatview_write_continue ../system/physmem.c:3002
     #8 0x56492d3a007c in flatview_write ../system/physmem.c:3033
     #9 0x56492d3a0376 in subpage_write ../system/physmem.c:2635
     #10 0x56492d368449 in access_with_adjusted_size ../system/memory.c:566
     #11 0x56492d36de3c in memory_region_dispatch_write 
../system/memory.c:1553
     #12 0x56492d6b16a4 in int_st_mmio_leN ../accel/tcg/cputlb.c:2503
     #13 0x56492d6b1a3b in do_st_mmio_leN ../accel/tcg/cputlb.c:2538
     #14 0x56492d6c80e8 in do_st_4 ../accel/tcg/cputlb.c:2708
     #15 0x56492d6c80e8 in do_st4_mmu ../accel/tcg/cputlb.c:2784
     #16 0x7fd5c72bcf7d  (/memfd:tcg-jit (deleted)+0x527ff7d)

SUMMARY: UndefinedBehaviorSanitizer: undefined-behavior 
../net/checksum.c:78:23

Regards,
Pierrick