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From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm <qemu-arm@nongnu.org>, QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PATCH v1 07/11] target/arm: Implement bfloat16 dot product (indexed)
Date: Tue, 18 May 2021 09:38:23 -0500	[thread overview]
Message-ID: <cf64216c-c42f-4057-fd61-aeeb0c227411@linaro.org> (raw)
In-Reply-To: <CAFEAcA-casxqgg-GJEckyTxRp3c2=kguU7YcOhvSYiFrnBvt-Q@mail.gmail.com>

On 5/18/21 7:24 AM, Peter Maydell wrote:
>> -    case 0x0f: /* SUDOT, USDOT */
>> -        gen_gvec_op4_ool(s, is_q, rd, rn, rm, rd, index,
>> -                         extract32(insn, 23, 1)
>> -                         ? gen_helper_gvec_usdot_idx_b
>> -                         : gen_helper_gvec_sudot_idx_b);
>> -        return;
>> -
>> +    case 0x0f:
>> +        switch (extract32(insn, 22, 2)) {
> 
> You already have bits [23:22] in 'size' at this point, I think.

Irritatingly not.  For 0xf [23:22] is opcode, and size has been squashed to 
MO_32 in order to get the indexing correct in the middle of this function. 
It's just outside the patch context here.  Later it will be moved inside a 
switch for BFMLAL.

One of the many ways in which decodetree would be better here.


r~


  reply	other threads:[~2021-05-18 14:42 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-16 23:59 [PATCH v1 for-6.1 00/11] target/arm: Implement BFloat16 Richard Henderson
2021-04-16 23:59 ` [PATCH v1 01/11] target/arm: Add isar_feature_{aa32, aa64, aa64_sve}_bf16 Richard Henderson
2021-05-18 10:43   ` Peter Maydell
2021-04-16 23:59 ` [PATCH v1 02/11] target/arm: Unify unallocated path in disas_fp_1src Richard Henderson
2021-05-18 10:43   ` Peter Maydell
2021-04-16 23:59 ` [PATCH v1 03/11] target/arm: Implement scalar float32 to bfloat16 conversion Richard Henderson
2021-05-18 10:53   ` Peter Maydell
2021-04-16 23:59 ` [PATCH v1 04/11] target/arm: Implement vector " Richard Henderson
2021-05-18 11:10   ` Peter Maydell
2021-05-18 14:32     ` Richard Henderson
2021-04-16 23:59 ` [PATCH v1 05/11] fpu: Add float_round_to_odd_inf Richard Henderson
2021-05-18 11:20   ` Peter Maydell
2021-05-18 14:24     ` Richard Henderson
2021-04-16 23:59 ` [PATCH v1 06/11] target/arm: Implement bfloat16 dot product (vector) Richard Henderson
2021-05-18 12:15   ` Peter Maydell
2021-05-18 14:27     ` Richard Henderson
2021-04-16 23:59 ` [PATCH v1 07/11] target/arm: Implement bfloat16 dot product (indexed) Richard Henderson
2021-05-18 12:24   ` Peter Maydell
2021-05-18 14:38     ` Richard Henderson [this message]
2021-04-16 23:59 ` [PATCH v1 08/11] target/arm: Implement bfloat16 matrix multiply accumulate Richard Henderson
2021-05-18 12:37   ` Peter Maydell
2021-05-18 14:45     ` Richard Henderson
2021-04-16 23:59 ` [PATCH v1 09/11] target/arm: Implement bfloat widening fma (vector) Richard Henderson
2021-05-18 12:42   ` Peter Maydell
2021-04-16 23:59 ` [PATCH v1 10/11] target/arm: Implement bfloat widening fma (indexed) Richard Henderson
2021-05-18 12:46   ` Peter Maydell
2021-04-16 23:59 ` [PATCH v1 11/11] target/arm: Enable BFloat16 extensions Richard Henderson
2021-05-18 12:47   ` Peter Maydell
2021-05-18 14:47     ` Richard Henderson
2021-05-25 16:57       ` Richard Henderson

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