From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=48760 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OCZDg-0004iS-J3 for qemu-devel@nongnu.org; Thu, 13 May 2010 10:17:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OCZDa-0005Wk-VK for qemu-devel@nongnu.org; Thu, 13 May 2010 10:17:00 -0400 Received: from fmmailgate03.web.de ([217.72.192.234]:60830) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OCZDa-0005Vu-Kh for qemu-devel@nongnu.org; Thu, 13 May 2010 10:16:54 -0400 From: Jan Kiszka Date: Thu, 13 May 2010 16:16:44 +0200 Message-Id: Sender: jan.kiszka@web.de Subject: [Qemu-devel] [PATCH 0/4] Fix the lazy CFI mode switch List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Michael Walle This series addresses the major problem lazy mode switching of the pflash_cfi02 currently has: code execution from this ROM can fail. The reason for this was a conceptual issue that was papered over by a bug in the original implementation. Both are addressed here by - allowing code execution from marked I/O memory regions (specifically ROM devices) - performing the lazy switch back of cfi02 from reprogramming to ROM mode via a timer To recall why this effort is needed: Programming 7 MB of an 8 MB flash that does not support the unlock bypass command takes 5:40 minutes with this optimization and about 3 h (estimated, it became boring to wait for completion) without it. Jan Kiszka (4): cfi02: Fix a debug print Add support for execution from ROMs in IO device mode cfi: Mark flash memory executable cfi02: Use timer-based ROM mode switch cpu-common.h | 2 ++ exec-all.h | 2 +- exec.c | 2 +- hw/pflash_cfi01.c | 9 +++++---- hw/pflash_cfi02.c | 46 ++++++++++++++++++++++++++++++++++------------ 5 files changed, 43 insertions(+), 18 deletions(-)