From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=52755 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pfoq1-0001No-SE for qemu-devel@nongnu.org; Thu, 20 Jan 2011 02:21:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Pfoq0-00017L-Gd for qemu-devel@nongnu.org; Thu, 20 Jan 2011 02:21:45 -0500 Received: from mail.valinux.co.jp ([210.128.90.3]:55281) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Pfoq0-00016G-6q for qemu-devel@nongnu.org; Thu, 20 Jan 2011 02:21:44 -0500 From: Isaku Yamahata Date: Thu, 20 Jan 2011 16:21:37 +0900 Message-Id: Subject: [Qemu-devel] [PATCH 0/3] pci: disable intx on flr/bus reset List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: yamahata@valinux.co.jp, mst@redhat.com So far pci_device_reset() is used for system reset. In that case, interrupt controller is also reset so that all irq is are deasserted. But now pci bus reset/flr is supported, and in that case irq needs to be disabled explicitly. Isaku Yamahata (3): pci: deassert intx on reset. msi: simply write config a bit. msix: simply write config hw/msi.c | 5 +---- hw/msix.c | 5 +---- hw/pci.c | 9 +++++++++ hw/pci.h | 2 ++ 4 files changed, 13 insertions(+), 8 deletions(-)