From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:42658) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RmSBE-0000fo-TJ for qemu-devel@nongnu.org; Sun, 15 Jan 2012 10:39:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RmSB9-0007Bp-Fs for qemu-devel@nongnu.org; Sun, 15 Jan 2012 10:39:36 -0500 Received: from relay4-d.mail.gandi.net ([217.70.183.196]:52465) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RmSB9-0007BT-8R for qemu-devel@nongnu.org; Sun, 15 Jan 2012 10:39:31 -0500 Date: Mon, 16 Jan 2012 02:39:15 +1100 From: Josh Triplett Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Subject: [Qemu-devel] [PATCH 0/3] Support configurable CPU Model-Specific Registers (MSRs) in cpudefs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Anthony Liguori , Paul Brook This patch series adds configuration options allowing CPU definitions to support rdmsr on arbitrary MSRs with corresponding values, and to GPF on unknown MSRs. This allows better emulation of CPU-specific behavior. I plan to use this to allow testing many of the CPU-specific tests in BITS (http://biosbits.org/) via qemu/kvm rather than always via real systems with the CPUs in question. I've attached a sample configuration file for these new options, created by copying the "Nehalem" CPU definition from the standard configuration file and adding "NehalemGPF" and "NehalemMSR" definitions which take advantage of the first and the first two patches, respectively. This sample configuration makes it easy to validate the behavior added by the first two patches. I used a QDict to store the map from MSR numbers to values. Unfortunately, QDict only supports strings as keys, so I had to format the MSR as a hex string before looking it up. The third patch in the series provides a bugfix for CPU definition parsing, which will otherwise add a partial CPU definition (up to the parse failure) to the list of CPU definitions. Written on the plane to linux.conf.au. Josh Triplett (3): Add cpudef option to GPF on unknown MSRs Support arbitrary additional MSRs in cpu definitions Handle parse failures in CPU definitions, and avoid adding a partial cpudef qemu-config.c | 6 ++++ target-i386/cpu.h | 6 ++++ target-i386/cpuid.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++- target-i386/op_helper.c | 36 +++++++++++++++++++++++++--- 4 files changed, 102 insertions(+), 5 deletions(-) -- 1.7.8.3