[Qemu-devel] [PATCH v1 0/3] Xilinx-Zynq boot process patches

[Qemu-devel] [PATCH v1 0/3] Xilinx-Zynq boot process patches

[Peter A. G. Crosthwaite]

These patches allow for booting of smp linux as well as custom initrd and dtb blobs on the xilinx zynq platform.

Patch 1 is dual core smp support.
Patch 2 parameterises the previously hardcoded initrd and dtb address offsets for the arm bootloader.
Patch 3 fixes the initrd and dtb addresses for zynq.

Peter A. G. Crosthwaite (3):
  xilinx_zynq: added smp support
  arm_boot: parameterized intird and dtb locations
  xilinx_zynq: set initrd and dtb locations

 hw/arm-misc.h    |    8 ++++++
 hw/arm_boot.c    |   34 ++++++++++++++++-----------
 hw/xilinx_zynq.c |   66 +++++++++++++++++++++++++++++++++++++++++++++---------
 3 files changed, 83 insertions(+), 25 deletions(-)

-- 
1.7.3.2

[Qemu-devel] [PATCH v1 1/3] xilinx_zynq: added smp support

[Peter A. G. Crosthwaite]

Added linux smp support for the xilinx zynq platform (2x cpus are supported)

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
---
 hw/xilinx_zynq.c |   64 ++++++++++++++++++++++++++++++++++++++++++++---------
 1 files changed, 53 insertions(+), 11 deletions(-)

diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index 7290c64..56d0b96 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@@ -30,6 +30,42 @@
 
 #define IRQ_OFFSET 32 /* pic interrupts start from index 32 */
 
+#define SMP_BOOT_ADDR 0x0fff0000
+
+static void zynq_reset_secondary(CPUARMState *env,
+                                    const struct arm_boot_info *info)
+{
+    env->regs[15] = SMP_BOOT_ADDR;
+}
+
+/* Entry point for secondary CPU */
+static uint32_t zynq_smpboot[] = {
+    0xe59f0020, /* ldr     r0, privbase */
+    0xe3a004FF, /* mov     r0 = 0xFFFFFFF0 */
+    0xe38008FF, /* orr     ...*/
+    0xe3800CFF, /* orr     .... */
+    0xe38000F0, /* orr     ..... */
+    0xe320f002, /* wfe */
+    0xe5901000, /* ldr     r1, [r0] */
+    0xe1110001, /* tst     r1, r1 */
+    0x0afffffb, /* beq     <wfe> */
+    0xe12fff11, /* bx      r1 */
+    0,
+    0
+};
+
+static void zynq_write_secondary_boot(CPUARMState *env,
+                                    const struct arm_boot_info *info)
+{
+    int n;
+
+    for (n = 0; n < ARRAY_SIZE(zynq_smpboot); n++) {
+        zynq_smpboot[n] = tswap32(zynq_smpboot[n]);
+    }
+    rom_add_blob_fixed("smpboot", zynq_smpboot, sizeof(zynq_smpboot),
+            SMP_BOOT_ADDR);
+}
+
 static struct arm_boot_info zynq_binfo = {};
 
 static void gem_init(NICInfo *nd, uint32_t base, qemu_irq irq)
@@ -60,19 +96,21 @@ static void zynq_init(ram_addr_t ram_size, const char *boot_device,
     qemu_irq pic[64];
     NICInfo *nd;
     int n;
-    qemu_irq cpu_irq;
+    qemu_irq cpu_irq[2];
 
     if (!cpu_model) {
         cpu_model = "cortex-a9";
     }
 
-    env = cpu_init(cpu_model);
-    if (!env) {
-        fprintf(stderr, "Unable to find CPU definition\n");
-        exit(1);
+    for (n = 0; n < smp_cpus; n++) {
+        env = cpu_init(cpu_model);
+        if (!env) {
+            fprintf(stderr, "Unable to find CPU definition\n");
+            exit(1);
+        }
+        irqp = arm_pic_init_cpu(env);
+        cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];
     }
-    irqp = arm_pic_init_cpu(env);
-    cpu_irq = irqp[ARM_PIC_CPU_IRQ];
 
     /* max 2GB ram */
     if (ram_size > 0x80000000) {
@@ -103,11 +141,13 @@ static void zynq_init(ram_addr_t ram_size, const char *boot_device,
     sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0xF8000000);
 
     dev = qdev_create(NULL, "a9mpcore_priv");
-    qdev_prop_set_uint32(dev, "num-cpu", 1);
+    qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
     qdev_init_nofail(dev);
     busdev = sysbus_from_qdev(dev);
     sysbus_mmio_map(busdev, 0, 0xF8F00000);
-    sysbus_connect_irq(busdev, 0, cpu_irq);
+    for (n = 0; n < smp_cpus; n++) {
+        sysbus_connect_irq(busdev, n, cpu_irq[n]);
+    }
 
     for (n = 0; n < 64; n++) {
         pic[n] = qdev_get_gpio_in(dev, n);
@@ -134,7 +174,9 @@ static void zynq_init(ram_addr_t ram_size, const char *boot_device,
     zynq_binfo.kernel_filename = kernel_filename;
     zynq_binfo.kernel_cmdline = kernel_cmdline;
     zynq_binfo.initrd_filename = initrd_filename;
-    zynq_binfo.nb_cpus = 1;
+    zynq_binfo.nb_cpus = smp_cpus;
+    zynq_binfo.write_secondary_boot = zynq_write_secondary_boot;
+    zynq_binfo.secondary_cpu_reset_hook = zynq_reset_secondary;
     zynq_binfo.board_id = 0xd32;
     zynq_binfo.loader_start = 0;
     arm_load_kernel(first_cpu, &zynq_binfo);
@@ -145,7 +187,7 @@ static QEMUMachine zynq_machine = {
     .desc = "Xilinx Zynq Platform Baseboard for Cortex-A9",
     .init = zynq_init,
     .use_scsi = 1,
-    .max_cpus = 1,
+    .max_cpus = 2,
     .no_sdcard = 1
 };
 
-- 
1.7.3.2

[Qemu-devel] [PATCH v1 2/3] arm_boot: parameterized intird and dtb locations

[Peter A. G. Crosthwaite]

Added fields that allows a machine model to specify where the initrd and dtb
are loaded. Leaving the fields 0 will use to old default values (previously
hardcoded in arm_boot.c)

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
---
 hw/arm-misc.h |    8 ++++++++
 hw/arm_boot.c |   34 ++++++++++++++++++++--------------
 2 files changed, 28 insertions(+), 14 deletions(-)

diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index 2f46e21..25f3da8 100644
--- a/hw/arm-misc.h
+++ b/hw/arm-misc.h
@@ -31,6 +31,14 @@ struct arm_boot_info {
     const char *initrd_filename;
     const char *dtb_filename;
     target_phys_addr_t loader_start;
+    /* where to place the initrd relative to loader start. A value of 0
+     * will select the default value of loader_start + 0xd00000.
+     */
+    target_phys_addr_t initrd_offset;
+    /* where to place the dtb relative to loader start. A value of 0 will
+     * place it immediately after the initrd (page aligned).
+     */
+    target_phys_addr_t dtb_offset;
     /* multicore boards that use the default secondary core boot functions
      * need to put the address of the secondary boot code, the boot reg,
      * and the GIC address in the next 3 values, respectively. boards that
diff --git a/hw/arm_boot.c b/hw/arm_boot.c
index 7447f5c..302bd17 100644
--- a/hw/arm_boot.c
+++ b/hw/arm_boot.c
@@ -18,7 +18,8 @@
 
 #define KERNEL_ARGS_ADDR 0x100
 #define KERNEL_LOAD_ADDR 0x00010000
-#define INITRD_LOAD_ADDR 0x00d00000
+
+#define DEFAULT_INITRD_OFFSET 0x00d00000
 
 /* The worlds second smallest bootloader.  Set r0-r2, then jump to kernel.  */
 static uint32_t bootloader[] = {
@@ -107,7 +108,7 @@ static void set_kernel_args(const struct arm_boot_info *info)
         /* ATAG_INITRD2 */
         WRITE_WORD(p, 4);
         WRITE_WORD(p, 0x54420005);
-        WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR);
+        WRITE_WORD(p, info->loader_start + info->initrd_offset);
         WRITE_WORD(p, initrd_size);
     }
     if (info->kernel_cmdline && *info->kernel_cmdline) {
@@ -184,7 +185,7 @@ static void set_kernel_args_old(const struct arm_boot_info *info)
     WRITE_WORD(p, 0);
     /* initrd_start */
     if (initrd_size)
-        WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR);
+        WRITE_WORD(p, info->loader_start + info->initrd_offset);
     else
         WRITE_WORD(p, 0);
     /* initrd_size */
@@ -211,7 +212,7 @@ static void set_kernel_args_old(const struct arm_boot_info *info)
     }
 }
 
-static int load_dtb(target_phys_addr_t addr, const struct arm_boot_info *binfo)
+static int load_dtb(const struct arm_boot_info *binfo)
 {
 #ifdef CONFIG_FDT
     uint32_t mem_reg_property[] = { cpu_to_be32(binfo->loader_start),
@@ -248,20 +249,21 @@ static int load_dtb(target_phys_addr_t addr, const struct arm_boot_info *binfo)
 
     if (binfo->initrd_size) {
         rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
-                binfo->loader_start + INITRD_LOAD_ADDR);
+                binfo->loader_start + binfo->initrd_offset);
         if (rc < 0) {
             fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
         }
 
         rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
-                    binfo->loader_start + INITRD_LOAD_ADDR +
+                    binfo->loader_start + binfo->initrd_offset +
                     binfo->initrd_size);
         if (rc < 0) {
             fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
         }
     }
 
-    cpu_physical_memory_write(addr, fdt, size);
+    cpu_physical_memory_write(binfo->loader_start + binfo->dtb_offset,
+                                                                fdt, size);
 
     return 0;
 
@@ -362,10 +364,13 @@ void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
     info->entry = entry;
     if (is_linux) {
         if (info->initrd_filename) {
+            if (!info->initrd_offset) {
+                info->initrd_offset = DEFAULT_INITRD_OFFSET;
+            }
             initrd_size = load_image_targphys(info->initrd_filename,
                                               info->loader_start
-                                              + INITRD_LOAD_ADDR,
-                                              ram_size - INITRD_LOAD_ADDR);
+                                              + info->initrd_offset,
+                                              ram_size - info->initrd_offset);
             if (initrd_size < 0) {
                 fprintf(stderr, "qemu: could not load initrd '%s'\n",
                         info->initrd_filename);
@@ -382,14 +387,15 @@ void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
          * we point to the kernel args.
          */
         if (info->dtb_filename) {
-            /* Place the DTB after the initrd in memory */
-            target_phys_addr_t dtb_start = TARGET_PAGE_ALIGN(info->loader_start
-                                                             + INITRD_LOAD_ADDR
+            if (!info->dtb_offset) {
+                /* Place the DTB after the initrd in memory */
+                info->dtb_offset = TARGET_PAGE_ALIGN(info->initrd_offset
                                                              + initrd_size);
-            if (load_dtb(dtb_start, info)) {
+            }
+            if (load_dtb(info)) {
                 exit(1);
             }
-            bootloader[5] = dtb_start;
+            bootloader[5] = info->loader_start + info->dtb_offset;
         } else {
             bootloader[5] = info->loader_start + KERNEL_ARGS_ADDR;
         }
-- 
1.7.3.2

[Qemu-devel] [PATCH v1 3/3] xilinx_zynq: set initrd and dtb locations

[Peter A. G. Crosthwaite]

The xilinx published kernel and linux test binaries expects initrd and dtb to
be at these locations

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
---
 hw/xilinx_zynq.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index 56d0b96..31d9e81 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@@ -174,6 +174,8 @@ static void zynq_init(ram_addr_t ram_size, const char *boot_device,
     zynq_binfo.kernel_filename = kernel_filename;
     zynq_binfo.kernel_cmdline = kernel_cmdline;
     zynq_binfo.initrd_filename = initrd_filename;
+    zynq_binfo.initrd_offset = 0x00800000;
+    zynq_binfo.dtb_offset = 0x01000000;
     zynq_binfo.nb_cpus = smp_cpus;
     zynq_binfo.write_secondary_boot = zynq_write_secondary_boot;
     zynq_binfo.secondary_cpu_reset_hook = zynq_reset_secondary;
-- 
1.7.3.2