From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:32797) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ShRF8-0003MM-6V for qemu-devel@nongnu.org; Wed, 20 Jun 2012 16:11:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ShRF6-0003Dw-AK for qemu-devel@nongnu.org; Wed, 20 Jun 2012 16:11:09 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46371) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ShRF6-0003DY-2U for qemu-devel@nongnu.org; Wed, 20 Jun 2012 16:11:08 -0400 Date: Wed, 20 Jun 2012 16:11:00 -0400 From: Jason Baron Message-Id: Subject: [Qemu-devel] [PATCH 0/3] iommu: isa dma engine support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: anthony@codemonkey.ws, benh@kernel.crashing.org Cc: mst@redhat.com, jan.kiszka@siemens.com, armbru@redhat.com, qemu-devel@nongnu.org, yamahata@valinux.co.jp, alex.williamson@redhat.com, ddutile@redhat.com, afaerber@suse.de Hi, Based on Benjamin Herrenschmidt's iommu series - these patches provide infrastructure for a chipset topology where an iommu can sit between main memory and the isa dma engine. The idea is remap addresses according to the iommu's wish when we are performing a dma engine r/w operation. Since the iommu context is tied to the isa device structure, it can be set independently of the bus on which the isa device resides. Thus, I'm hoping that this patchset allows us to correctly model more complex chipset topologies. Thanks, -Jason Jason Baron (3): iommu: remove extra 'typedef struct DMAContext' iommu: add support for the isa dma engine iommu: add generic mapping support for the isa bus dma.h | 5 ++--- hw/cs4231a.c | 2 +- hw/dma.c | 19 ++++++++++++------- hw/fdc.c | 10 +++++----- hw/gus.c | 2 +- hw/isa-bus.c | 14 ++++++++++++++ hw/isa.h | 9 ++++++++- hw/sb16.c | 4 ++-- hw/sun4m.c | 2 +- hw/sun4u.c | 2 +- 10 files changed, 47 insertions(+), 22 deletions(-)