[Qemu-devel] [PATCH v5 00/15] Ehnahced SSI bus support + M25P80 SPI flash + Xilinx SPI controller

["Peter A. G. Crosthwaite" <peter.crosthwaite@petalogix.com>]

This series reworks the SSI bus framework for SPI and add some new SPI controllers and devices:

Patches 1-5 reworks SSI to add chip-select support to SPI devices and allow for multiple SPI devices attach
ed to the same bus.

Patches 6-7 fix the SPI setup in the stellaris machine model.

Patch 8 is a trivial cleanup I did along the way.

Patch 9 is a general FIFO helper API used by the upcomming patches.

Patch 10 is a device model for the m25p80 SPI flash family.

Patches 11 & 13 are the Xilinx SPI flash controller devices

Patches 12 & 14 add SPI controllers to the ML605 and Zynq machine models.

Patch 15 is Maintainerships.

CHANGELOG:
changed from v4 (Major changes):
Completely reworked SPI refactor. Please re-review from scratch.
Added Zynq SPI flash.
Factored out FIFO functionality from SPI flash controller.
changed from v3:
addressed reviewer comments from P Maydell and S Hajnoczi
added patch 5 (re Paul Brooks request)
changed from v2:
folded former SPI bus functionality into existing SSI infrastructure (suggested - Paul Brook) (all patches)
made m25p80 use async io (suggested - Stefan Hajnoczi) (2/4)
instantiated two spi flashes instead of one in ml605 ref design (4/4)
changed from v1:
minor sylistic changes (1/4)
converted spi api to modified txrx style (1-3/4)
heavily refactored m25p80 model (2/4)

Peter A. G. Crosthwaite (15):
  ssi: Support for multiple attached devices
  ssi: Added VMSD stub
  ssi: Implemented CS behaviour
  ssi: Added create_slave_no_init()
  qdev: allow multiple qdev_init_gpio_in() calls
  hw/stellaris: Removed gpio_out init array.
  stellaris: Removed SSI mux
  ssd0323: abort() instead of exit(1) on error.
  hw: Added generic FIFO API.
  m25p80: Initial implementation of SPI flash device
  xilinx_spi: Initial impl. of Xilinx SPI controller
  petalogix-ml605: added SPI controller with n25q128
  xilinx_spips: Xilinx Zynq SPI cntrlr device model
  xilinx_zynq: Added SPI controllers + flashes
  MAINTAINERS: Added maintainerships for SSI

 MAINTAINERS                              |    8 +
 default-configs/arm-softmmu.mak          |    1 +
 default-configs/microblaze-softmmu.mak   |    2 +
 default-configs/microblazeel-softmmu.mak |    2 +
 hw/Makefile.objs                         |    2 +
 hw/ads7846.c                             |    1 +
 hw/arm/Makefile.objs                     |    1 +
 hw/fifo.c                                |   79 ++++
 hw/fifo.h                                |   47 +++
 hw/m25p80.c                              |  572 ++++++++++++++++++++++++++++++
 hw/max111x.c                             |    1 +
 hw/microblaze/Makefile.objs              |    1 +
 hw/petalogix_ml605_mmu.c                 |   28 ++-
 hw/qdev.c                                |   16 +-
 hw/spitz.c                               |    2 +
 hw/ssd0323.c                             |   11 +-
 hw/ssi-sd.c                              |    7 +
 hw/ssi.c                                 |   76 ++++-
 hw/ssi.h                                 |   38 ++
 hw/stellaris.c                           |  111 ++-----
 hw/xilinx_spi.c                          |  390 ++++++++++++++++++++
 hw/xilinx_spips.c                        |  352 ++++++++++++++++++
 hw/xilinx_zynq.c                         |   34 ++
 hw/z2.c                                  |    1 +
 24 files changed, 1675 insertions(+), 108 deletions(-)
 create mode 100644 hw/fifo.c
 create mode 100644 hw/fifo.h
 create mode 100644 hw/m25p80.c
 create mode 100644 hw/xilinx_spi.c
 create mode 100644 hw/xilinx_spips.c