From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:57293) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TG4oX-0001OX-Pw for qemu-devel@nongnu.org; Mon, 24 Sep 2012 05:18:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TG4oW-0002bb-In for qemu-devel@nongnu.org; Mon, 24 Sep 2012 05:18:53 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:48792) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TG4oW-0002bX-CJ for qemu-devel@nongnu.org; Mon, 24 Sep 2012 05:18:52 -0400 Received: by pbbrp2 with SMTP id rp2so896912pbb.4 for ; Mon, 24 Sep 2012 02:18:51 -0700 (PDT) From: "Peter A. G. Crosthwaite" Date: Mon, 24 Sep 2012 19:18:30 +1000 Message-Id: Subject: [Qemu-devel] [PATCH v7 00/13] Ehnahced SSI bus support + M25P80 SPI flash + Xilinx SPI controller List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, paul@codesourcery.com, edgar.iglesias@gmail.com, peter.maydell@linaro.org, stefanha@gmail.com Cc: blauwirbel@gmail.com, "Peter A. G. Crosthwaite" , i.mitsyanko@samsung.com This series reworks the SSI bus framework for SPI and add some new SPI controllers and devices: Patches 1-4 reworks SSI to add chip-select support to SPI devices and allow for multiple SPI devices attached to the same bus. Patches 5-6 fix the SPI setup in the stellaris machine model. Patch 7 is a general FIFO helper API used by the upcomming patches. Patch 8 is a device model for the m25p80 SPI flash family. Patches 9 & 11 are the Xilinx SPI flash controller devices Patches 10 & 12 add SPI controllers to the ML605 and Zynq machine models. Patch 13 is Maintainerships. CHANGELOG: changed from v6: Address Blue Swirl Review (P8, P11) changed from v5: VMSD version bump various line-by-line review fixes removed trivial patch (formerly P8) collapsed former P2-3 into one patch for bisectability changed from v4 (Major changes): Completely reworked SPI refactor. Please re-review from scratch. Added Zynq SPI flash. Factored out FIFO functionality from SPI flash controller. changed from v3: addressed reviewer comments from P Maydell and S Hajnoczi added patch 5 (re Paul Brooks request) changed from v2: folded former SPI bus functionality into existing SSI infrastructure (suggested - Paul Brook) (all patches) made m25p80 use async io (suggested - Stefan Hajnoczi) (2/4) instantiated two spi flashes instead of one in ml605 ref design (4/4) changed from v1: minor sylistic changes (1/4) converted spi api to modified txrx style (1-3/4) heavily refactored m25p80 model (2/4) Peter A. G. Crosthwaite (13): ssi: Support for multiple attached devices ssi: Implemented CS behaviour ssi: Added create_slave_no_init() qdev: allow multiple qdev_init_gpio_in() calls hw/stellaris: Removed gpio_out init array. stellaris: Removed SSI mux hw: Added generic FIFO API. m25p80: Initial implementation of SPI flash device xilinx_spi: Initial impl. of Xilinx SPI controller petalogix-ml605: added SPI controller with n25q128 xilinx_spips: Xilinx Zynq SPI cntrlr device model xilinx_zynq: Added SPI controllers + flashes MAINTAINERS: Added maintainerships for SSI MAINTAINERS | 8 + default-configs/arm-softmmu.mak | 1 + default-configs/microblaze-softmmu.mak | 2 + default-configs/microblazeel-softmmu.mak | 2 + hw/Makefile.objs | 2 + hw/ads7846.c | 7 +- hw/arm/Makefile.objs | 1 + hw/fifo.c | 78 ++++ hw/fifo.h | 47 +++ hw/irq.c | 17 +- hw/irq.h | 11 +- hw/m25p80.c | 573 ++++++++++++++++++++++++++++++ hw/max111x.c | 7 +- hw/microblaze/Makefile.objs | 1 + hw/petalogix_ml605_mmu.c | 27 ++ hw/qdev.c | 6 +- hw/spitz.c | 8 +- hw/ssd0323.c | 7 + hw/ssi-sd.c | 7 + hw/ssi.c | 76 ++++- hw/ssi.h | 38 ++ hw/stellaris.c | 111 ++----- hw/xilinx_spi.c | 390 ++++++++++++++++++++ hw/xilinx_spips.c | 352 ++++++++++++++++++ hw/xilinx_zynq.c | 34 ++ hw/z2.c | 7 +- 26 files changed, 1698 insertions(+), 122 deletions(-) create mode 100644 hw/fifo.c create mode 100644 hw/fifo.h create mode 100644 hw/m25p80.c create mode 100644 hw/xilinx_spi.c create mode 100644 hw/xilinx_spips.c