From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41878) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UmCt4-0008B7-VP for qemu-devel@nongnu.org; Mon, 10 Jun 2013 20:56:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UmCt3-0006Xo-OA for qemu-devel@nongnu.org; Mon, 10 Jun 2013 20:56:38 -0400 Received: from mail-pd0-f178.google.com ([209.85.192.178]:38467) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UmCt3-0006Xd-Hx for qemu-devel@nongnu.org; Mon, 10 Jun 2013 20:56:37 -0400 Received: by mail-pd0-f178.google.com with SMTP id w11so3600134pde.37 for ; Mon, 10 Jun 2013 17:56:36 -0700 (PDT) Sender: Peter Crosthwaite From: peter.crosthwaite@xilinx.com Date: Tue, 11 Jun 2013 10:56:55 +1000 Message-Id: Subject: [Qemu-devel] [PATCH v2 0/5] Xilinx Intc Fixes List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: edgar.iglesias@gmail.com From: Peter Crosthwaite Various fixups to the Xilinx Interrupt controller following a review against TRM and RTL descriptions. Tested as working for microblaze and microblazeel Linux. change from v1: Fixed S3ADSP UART interrupt - done first for bisectability (Now tested as working on s3asdsp design) Peter Crosthwaite (5): microblaze/petalogix_s3adsp1800_mmu: Fix UART IRQ intc/xilinx_intc: Don't clear level sens. IRQs without ACK intc/xilinx_intc: Handle level interrupt retriggering intc/xilinx_intc: Inhibit write to ISR when HIE intc/xilinx_intc: Dont lower IRQ when HIE cleared hw/intc/xilinx_intc.c | 28 ++++++++++++++++++---------- hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +- 2 files changed, 19 insertions(+), 11 deletions(-) -- 1.8.3.rc1.44.gb387c77.dirty