* [Qemu-devel] [PATCH v1 1/3] Change apic/kvm/xen to use QOM typing
2013-10-22 7:05 [Qemu-devel] [PATCH v1 0/3] refactor x86 apic to QOM typing Chen Fan
@ 2013-10-22 7:05 ` Chen Fan
2013-10-22 7:05 ` [Qemu-devel] [PATCH v1 2/3] Using CPU_FOREACH() instead of scanning local_apics Chen Fan
2013-10-22 7:05 ` [Qemu-devel] [PATCH v1 3/3] x86: move apic_state field from CPUX86State to X86CPU Chen Fan
2 siblings, 0 replies; 4+ messages in thread
From: Chen Fan @ 2013-10-22 7:05 UTC (permalink / raw)
To: qemu-devel; +Cc: Igor Mammedov, Andreas Färber
Get rid of unused icc_device_realize()
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
---
hw/cpu/icc_bus.c | 17 -----------------
hw/i386/kvm/apic.c | 10 ++++++++--
hw/intc/apic.c | 18 ++++++++++++++++--
hw/intc/apic_common.c | 17 +++--------------
hw/xen/xen_apic.c | 11 +++++++++--
include/hw/cpu/icc_bus.h | 1 -
include/hw/i386/apic_internal.h | 3 ++-
7 files changed, 38 insertions(+), 39 deletions(-)
diff --git a/hw/cpu/icc_bus.c b/hw/cpu/icc_bus.c
index 9a4ea7e..5038836 100644
--- a/hw/cpu/icc_bus.c
+++ b/hw/cpu/icc_bus.c
@@ -38,27 +38,10 @@ static const TypeInfo icc_bus_info = {
.instance_init = icc_bus_init,
};
-
-/* icc-device implementation */
-
-static void icc_device_realize(DeviceState *dev, Error **errp)
-{
- ICCDevice *id = ICC_DEVICE(dev);
- ICCDeviceClass *idc = ICC_DEVICE_GET_CLASS(id);
-
- if (idc->init) {
- if (idc->init(id) < 0) {
- error_setg(errp, "%s initialization failed.",
- object_get_typename(OBJECT(dev)));
- }
- }
-}
-
static void icc_device_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
- dc->realize = icc_device_realize;
dc->bus_type = TYPE_ICC_BUS;
}
diff --git a/hw/i386/kvm/apic.c b/hw/i386/kvm/apic.c
index 5609063..ba30599 100644
--- a/hw/i386/kvm/apic.c
+++ b/hw/i386/kvm/apic.c
@@ -171,21 +171,27 @@ static const MemoryRegionOps kvm_apic_io_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-static void kvm_apic_init(APICCommonState *s)
+static void kvm_apic_realize(DeviceState *dev, Error **errp)
{
+ APICCommonState *s = APIC_COMMON(dev);
+ APICCommonClass *acc = APIC_COMMON_GET_CLASS(s);
+
memory_region_init_io(&s->io_memory, NULL, &kvm_apic_io_ops, s, "kvm-apic-msi",
APIC_SPACE_SIZE);
if (kvm_has_gsi_routing()) {
msi_supported = true;
}
+ acc->parent_realize(dev, errp);
}
static void kvm_apic_class_init(ObjectClass *klass, void *data)
{
APICCommonClass *k = APIC_COMMON_CLASS(klass);
+ DeviceClass *dc = DEVICE_CLASS(klass);
- k->init = kvm_apic_init;
+ k->parent_realize = dc->realize;
+ dc->realize = kvm_apic_realize;
k->set_base = kvm_apic_set_base;
k->set_tpr = kvm_apic_set_tpr;
k->get_tpr = kvm_apic_get_tpr;
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index a913186..8080e20 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -871,22 +871,36 @@ static const MemoryRegionOps apic_io_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-static void apic_init(APICCommonState *s)
+static void apic_realize(DeviceState *dev, Error **errp)
{
+ APICCommonState *s = APIC_COMMON(dev);
+ APICCommonClass *acc = APIC_COMMON_GET_CLASS(s);
+ static int apic_no;
+
+ if (apic_no >= MAX_APICS) {
+ error_setg(errp, "the new apic number: %d "
+ "exceeded max apic number", apic_no);
+ return;
+ }
+
memory_region_init_io(&s->io_memory, OBJECT(s), &apic_io_ops, s, "apic-msi",
APIC_SPACE_SIZE);
s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, apic_timer, s);
+ s->idx = apic_no++;
local_apics[s->idx] = s;
msi_supported = true;
+ acc->parent_realize(dev, errp);
}
static void apic_class_init(ObjectClass *klass, void *data)
{
APICCommonClass *k = APIC_COMMON_CLASS(klass);
+ DeviceClass *dc = DEVICE_CLASS(klass);
- k->init = apic_init;
+ k->parent_realize = dc->realize;
+ dc->realize = apic_realize;
k->set_base = apic_set_base;
k->set_tpr = apic_set_tpr;
k->get_tpr = apic_get_tpr;
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index a0beb10..eac538f 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -284,21 +284,13 @@ static int apic_load_old(QEMUFile *f, void *opaque, int version_id)
return 0;
}
-static int apic_init_common(ICCDevice *dev)
+static void apic_common_realize(DeviceState *dev, Error **errp)
{
APICCommonState *s = APIC_COMMON(dev);
- APICCommonClass *info;
+ APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
static DeviceState *vapic;
- static int apic_no;
static bool mmio_registered;
- if (apic_no >= MAX_APICS) {
- return -1;
- }
- s->idx = apic_no++;
-
- info = APIC_COMMON_GET_CLASS(s);
- info->init(s);
if (!mmio_registered) {
ICCBus *b = ICC_BUS(qdev_get_parent_bus(DEVICE(dev)));
memory_region_add_subregion(b->apic_address_space, 0, &s->io_memory);
@@ -314,8 +306,6 @@ static int apic_init_common(ICCDevice *dev)
if (apic_report_tpr_access && info->enable_tpr_reporting) {
info->enable_tpr_reporting(s, true);
}
-
- return 0;
}
static void apic_dispatch_pre_save(void *opaque)
@@ -381,14 +371,13 @@ static Property apic_properties_common[] = {
static void apic_common_class_init(ObjectClass *klass, void *data)
{
- ICCDeviceClass *idc = ICC_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_apic_common;
dc->reset = apic_reset_common;
dc->no_user = 1;
dc->props = apic_properties_common;
- idc->init = apic_init_common;
+ dc->realize = apic_common_realize;
}
static const TypeInfo apic_common_type = {
diff --git a/hw/xen/xen_apic.c b/hw/xen/xen_apic.c
index 9f91e0f..cc5bbe5 100644
--- a/hw/xen/xen_apic.c
+++ b/hw/xen/xen_apic.c
@@ -36,8 +36,11 @@ static const MemoryRegionOps xen_apic_io_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-static void xen_apic_init(APICCommonState *s)
+static void xen_apic_init(DeviceState *dev, Error **errp)
{
+ APICCommonState *s = APIC_COMMON(dev);
+ APICCommonClass *acc = APIC_COMMON_GET_CLASS(s);
+
memory_region_init_io(&s->io_memory, OBJECT(s), &xen_apic_io_ops, s,
"xen-apic-msi", APIC_SPACE_SIZE);
@@ -45,6 +48,8 @@ static void xen_apic_init(APICCommonState *s)
&& CONFIG_XEN_CTRL_INTERFACE_VERSION >= 420
msi_supported = true;
#endif
+
+ acc->parent_realize(dev, errp);
}
static void xen_apic_set_base(APICCommonState *s, uint64_t val)
@@ -71,8 +76,10 @@ static void xen_apic_external_nmi(APICCommonState *s)
static void xen_apic_class_init(ObjectClass *klass, void *data)
{
APICCommonClass *k = APIC_COMMON_CLASS(klass);
+ DeviceClass *dc = DEVICE_CLASS(klass);
- k->init = xen_apic_init;
+ k->parent_realize = dc->realize;
+ dc->realize = xen_apic_realize;
k->set_base = xen_apic_set_base;
k->set_tpr = xen_apic_set_tpr;
k->get_tpr = xen_apic_get_tpr;
diff --git a/include/hw/cpu/icc_bus.h b/include/hw/cpu/icc_bus.h
index b550070..4bd6237 100644
--- a/include/hw/cpu/icc_bus.h
+++ b/include/hw/cpu/icc_bus.h
@@ -66,7 +66,6 @@ typedef struct ICCDeviceClass {
DeviceClass parent_class;
/*< public >*/
- int (*init)(ICCDevice *dev); /* TODO replace with QOM realize */
} ICCDeviceClass;
#define TYPE_ICC_DEVICE "icc-device"
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index 1b0a7fb..0d775dd 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -80,7 +80,6 @@ typedef struct APICCommonClass
{
ICCDeviceClass parent_class;
- void (*init)(APICCommonState *s);
void (*set_base)(APICCommonState *s, uint64_t val);
void (*set_tpr)(APICCommonState *s, uint8_t val);
uint8_t (*get_tpr)(APICCommonState *s);
@@ -89,6 +88,8 @@ typedef struct APICCommonClass
void (*external_nmi)(APICCommonState *s);
void (*pre_save)(APICCommonState *s);
void (*post_load)(APICCommonState *s);
+
+ DeviceRealize parent_realize;
} APICCommonClass;
struct APICCommonState {
--
1.8.1.4
^ permalink raw reply related [flat|nested] 4+ messages in thread* [Qemu-devel] [PATCH v1 2/3] Using CPU_FOREACH() instead of scanning local_apics
2013-10-22 7:05 [Qemu-devel] [PATCH v1 0/3] refactor x86 apic to QOM typing Chen Fan
2013-10-22 7:05 ` [Qemu-devel] [PATCH v1 1/3] Change apic/kvm/xen to use " Chen Fan
@ 2013-10-22 7:05 ` Chen Fan
2013-10-22 7:05 ` [Qemu-devel] [PATCH v1 3/3] x86: move apic_state field from CPUX86State to X86CPU Chen Fan
2 siblings, 0 replies; 4+ messages in thread
From: Chen Fan @ 2013-10-22 7:05 UTC (permalink / raw)
To: qemu-devel; +Cc: Igor Mammedov, Andreas Färber
And dropping MAX_APICS cast macro altogether.
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
---
hw/intc/apic.c | 82 +++++++++++++++++------------------------
include/hw/i386/apic_internal.h | 2 -
2 files changed, 33 insertions(+), 51 deletions(-)
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index 8080e20..fc18600 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -32,8 +32,6 @@
#define SYNC_TO_VAPIC 0x2
#define SYNC_ISR_IRR_TO_VAPIC 0x4
-static APICCommonState *local_apics[MAX_APICS + 1];
-
static void apic_set_irq(APICCommonState *s, int vector_num, int trigger_mode);
static void apic_update_irq(APICCommonState *s);
static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask,
@@ -200,18 +198,15 @@ static void apic_external_nmi(APICCommonState *s)
#define foreach_apic(apic, deliver_bitmask, code) \
{\
+ CPUState *cpu;\
int __i, __j, __mask;\
- for(__i = 0; __i < MAX_APIC_WORDS; __i++) {\
+ CPU_FOREACH(cpu) {\
+ apic = APIC_COMMON(X86_CPU(cpu)->env.apic_state);\
+ __i = apic->idx / 32;\
+ __j = apic->idx % 32;\
__mask = deliver_bitmask[__i];\
- if (__mask) {\
- for(__j = 0; __j < 32; __j++) {\
- if (__mask & (1 << __j)) {\
- apic = local_apics[__i * 32 + __j];\
- if (apic) {\
- code;\
- }\
- }\
- }\
+ if (__mask & (1 << __j)) {\
+ code;\
}\
}\
}
@@ -235,9 +230,13 @@ static void apic_bus_deliver(const uint32_t *deliver_bitmask,
}
}
if (d >= 0) {
- apic_iter = local_apics[d];
- if (apic_iter) {
- apic_set_irq(apic_iter, vector_num, trigger_mode);
+ CPUState *cpu;
+ CPU_FOREACH(cpu) {
+ apic_iter = APIC_COMMON(X86_CPU(cpu)->env.apic_state);
+ if (apic_iter->idx == d) {
+ apic_set_irq(apic_iter, vector_num, trigger_mode);
+ break;
+ }
}
}
}
@@ -422,18 +421,14 @@ static void apic_eoi(APICCommonState *s)
static int apic_find_dest(uint8_t dest)
{
- APICCommonState *apic = local_apics[dest];
- int i;
-
- if (apic && apic->id == dest)
- return dest; /* shortcut in case apic->id == apic->idx */
+ APICCommonState *apic;
+ CPUState *cpu;
- for (i = 0; i < MAX_APICS; i++) {
- apic = local_apics[i];
- if (apic && apic->id == dest)
- return i;
- if (!apic)
- break;
+ CPU_FOREACH(cpu) {
+ apic = APIC_COMMON(X86_CPU(cpu)->env.apic_state);
+ if (apic->id == dest) {
+ return apic->idx;
+ }
}
return -1;
@@ -443,7 +438,7 @@ static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask,
uint8_t dest, uint8_t dest_mode)
{
APICCommonState *apic_iter;
- int i;
+ CPUState *cpu;
if (dest_mode == 0) {
if (dest == 0xff) {
@@ -457,20 +452,17 @@ static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask,
} else {
/* XXX: cluster mode */
memset(deliver_bitmask, 0x00, MAX_APIC_WORDS * sizeof(uint32_t));
- for(i = 0; i < MAX_APICS; i++) {
- apic_iter = local_apics[i];
- if (apic_iter) {
- if (apic_iter->dest_mode == 0xf) {
- if (dest & apic_iter->log_dest)
- apic_set_bit(deliver_bitmask, i);
- } else if (apic_iter->dest_mode == 0x0) {
- if ((dest & 0xf0) == (apic_iter->log_dest & 0xf0) &&
- (dest & apic_iter->log_dest & 0x0f)) {
- apic_set_bit(deliver_bitmask, i);
- }
+ CPU_FOREACH(cpu) {
+ apic_iter = APIC_COMMON(X86_CPU(cpu)->env.apic_state);
+ if (apic_iter->dest_mode == 0xf) {
+ if (dest & apic_iter->log_dest) {
+ apic_set_bit(deliver_bitmask, apic_iter->idx);
+ }
+ } else if (apic_iter->dest_mode == 0x0) {
+ if ((dest & 0xf0) == (apic_iter->log_dest & 0xf0) &&
+ (dest & apic_iter->log_dest & 0x0f)) {
+ apic_set_bit(deliver_bitmask, apic_iter->idx);
}
- } else {
- break;
}
}
}
@@ -875,20 +867,12 @@ static void apic_realize(DeviceState *dev, Error **errp)
{
APICCommonState *s = APIC_COMMON(dev);
APICCommonClass *acc = APIC_COMMON_GET_CLASS(s);
- static int apic_no;
-
- if (apic_no >= MAX_APICS) {
- error_setg(errp, "the new apic number: %d "
- "exceeded max apic number", apic_no);
- return;
- }
memory_region_init_io(&s->io_memory, OBJECT(s), &apic_io_ops, s, "apic-msi",
APIC_SPACE_SIZE);
s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, apic_timer, s);
- s->idx = apic_no++;
- local_apics[s->idx] = s;
+ s->idx = s->id;
msi_supported = true;
acc->parent_realize(dev, errp);
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index 0d775dd..a8b7b46 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -64,8 +64,6 @@
#define VAPIC_ENABLE_BIT 0
#define VAPIC_ENABLE_MASK (1 << VAPIC_ENABLE_BIT)
-#define MAX_APICS 255
-
typedef struct APICCommonState APICCommonState;
#define TYPE_APIC_COMMON "apic-common"
--
1.8.1.4
^ permalink raw reply related [flat|nested] 4+ messages in thread* [Qemu-devel] [PATCH v1 3/3] x86: move apic_state field from CPUX86State to X86CPU
2013-10-22 7:05 [Qemu-devel] [PATCH v1 0/3] refactor x86 apic to QOM typing Chen Fan
2013-10-22 7:05 ` [Qemu-devel] [PATCH v1 1/3] Change apic/kvm/xen to use " Chen Fan
2013-10-22 7:05 ` [Qemu-devel] [PATCH v1 2/3] Using CPU_FOREACH() instead of scanning local_apics Chen Fan
@ 2013-10-22 7:05 ` Chen Fan
2 siblings, 0 replies; 4+ messages in thread
From: Chen Fan @ 2013-10-22 7:05 UTC (permalink / raw)
To: qemu-devel; +Cc: Igor Mammedov, Andreas Färber
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
---
cpu-exec.c | 2 +-
cpus.c | 5 ++---
hw/i386/kvmvapic.c | 8 +++-----
hw/i386/pc.c | 17 ++++++++---------
hw/intc/apic.c | 8 ++++----
target-i386/cpu-qom.h | 4 ++++
target-i386/cpu.c | 22 ++++++++++------------
target-i386/cpu.h | 4 ----
target-i386/helper.c | 9 ++++-----
target-i386/kvm.c | 23 ++++++++++-------------
target-i386/misc_helper.c | 8 ++++----
11 files changed, 50 insertions(+), 60 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 30cfa2a..2711c58 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -320,7 +320,7 @@ int cpu_exec(CPUArchState *env)
#if !defined(CONFIG_USER_ONLY)
if (interrupt_request & CPU_INTERRUPT_POLL) {
cpu->interrupt_request &= ~CPU_INTERRUPT_POLL;
- apic_poll_irq(env->apic_state);
+ apic_poll_irq(x86_env_get_cpu(env)->apic_state);
}
#endif
if (interrupt_request & CPU_INTERRUPT_INIT) {
diff --git a/cpus.c b/cpus.c
index e566297..4ace860 100644
--- a/cpus.c
+++ b/cpus.c
@@ -1383,12 +1383,11 @@ void qmp_inject_nmi(Error **errp)
CPU_FOREACH(cs) {
X86CPU *cpu = X86_CPU(cs);
- CPUX86State *env = &cpu->env;
- if (!env->apic_state) {
+ if (!cpu->apic_state) {
cpu_interrupt(cs, CPU_INTERRUPT_NMI);
} else {
- apic_deliver_nmi(env->apic_state);
+ apic_deliver_nmi(cpu->apic_state);
}
}
#elif defined(TARGET_S390X)
diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
index 1c2dbf5..9fa346b 100644
--- a/hw/i386/kvmvapic.c
+++ b/hw/i386/kvmvapic.c
@@ -366,7 +366,7 @@ static int vapic_enable(VAPICROMState *s, X86CPU *cpu)
(((hwaddr)cpu_number) << VAPIC_CPU_SHIFT);
cpu_physical_memory_rw(vapic_paddr + offsetof(VAPICState, enabled),
(void *)&enabled, sizeof(enabled), 1);
- apic_enable_vapic(cpu->env.apic_state, vapic_paddr);
+ apic_enable_vapic(cpu->apic_state, vapic_paddr);
s->state = VAPIC_ACTIVE;
@@ -496,12 +496,10 @@ static void vapic_enable_tpr_reporting(bool enable)
};
CPUState *cs;
X86CPU *cpu;
- CPUX86State *env;
CPU_FOREACH(cs) {
cpu = X86_CPU(cs);
- env = &cpu->env;
- info.apic = env->apic_state;
+ info.apic = cpu->apic_state;
run_on_cpu(cs, vapic_do_enable_tpr_reporting, &info);
}
}
@@ -697,7 +695,7 @@ static void vapic_write(void *opaque, hwaddr addr, uint64_t data,
default:
case 4:
if (!kvm_irqchip_in_kernel()) {
- apic_poll_irq(env->apic_state);
+ apic_poll_irq(cpu->apic_state);
}
break;
}
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 0c313fe..832c9b2 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -169,13 +169,14 @@ void cpu_smm_update(CPUX86State *env)
int cpu_get_pic_interrupt(CPUX86State *env)
{
int intno;
+ X86CPU *cpu = x86_env_get_cpu(env);
- intno = apic_get_interrupt(env->apic_state);
+ intno = apic_get_interrupt(cpu->apic_state);
if (intno >= 0) {
return intno;
}
/* read the irq from the PIC */
- if (!apic_accept_pic_intr(env->apic_state)) {
+ if (!apic_accept_pic_intr(cpu->apic_state)) {
return -1;
}
@@ -187,15 +188,13 @@ static void pic_irq_request(void *opaque, int irq, int level)
{
CPUState *cs = first_cpu;
X86CPU *cpu = X86_CPU(cs);
- CPUX86State *env = &cpu->env;
DPRINTF("pic_irqs: %s irq %d\n", level? "raise" : "lower", irq);
- if (env->apic_state) {
+ if (cpu->apic_state) {
CPU_FOREACH(cs) {
cpu = X86_CPU(cs);
- env = &cpu->env;
- if (apic_accept_pic_intr(env->apic_state)) {
- apic_deliver_pic_intr(env->apic_state, level);
+ if (apic_accept_pic_intr(cpu->apic_state)) {
+ apic_deliver_pic_intr(cpu->apic_state, level);
}
}
} else {
@@ -890,7 +889,7 @@ DeviceState *cpu_get_current_apic(void)
{
if (current_cpu) {
X86CPU *cpu = X86_CPU(current_cpu);
- return cpu->env.apic_state;
+ return cpu->apic_state;
} else {
return NULL;
}
@@ -984,7 +983,7 @@ void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
}
/* map APIC MMIO area if CPU has APIC */
- if (cpu && cpu->env.apic_state) {
+ if (cpu && cpu->apic_state) {
/* XXX: what if the base changes? */
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(icc_bridge), 0,
APIC_DEFAULT_ADDRESS, 0x1000);
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index fc18600..74edf81 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -201,7 +201,7 @@ static void apic_external_nmi(APICCommonState *s)
CPUState *cpu;\
int __i, __j, __mask;\
CPU_FOREACH(cpu) {\
- apic = APIC_COMMON(X86_CPU(cpu)->env.apic_state);\
+ apic = APIC_COMMON(X86_CPU(cpu)->apic_state);\
__i = apic->idx / 32;\
__j = apic->idx % 32;\
__mask = deliver_bitmask[__i];\
@@ -232,7 +232,7 @@ static void apic_bus_deliver(const uint32_t *deliver_bitmask,
if (d >= 0) {
CPUState *cpu;
CPU_FOREACH(cpu) {
- apic_iter = APIC_COMMON(X86_CPU(cpu)->env.apic_state);
+ apic_iter = APIC_COMMON(X86_CPU(cpu)->apic_state);
if (apic_iter->idx == d) {
apic_set_irq(apic_iter, vector_num, trigger_mode);
break;
@@ -425,7 +425,7 @@ static int apic_find_dest(uint8_t dest)
CPUState *cpu;
CPU_FOREACH(cpu) {
- apic = APIC_COMMON(X86_CPU(cpu)->env.apic_state);
+ apic = APIC_COMMON(X86_CPU(cpu)->apic_state);
if (apic->id == dest) {
return apic->idx;
}
@@ -453,7 +453,7 @@ static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask,
/* XXX: cluster mode */
memset(deliver_bitmask, 0x00, MAX_APIC_WORDS * sizeof(uint32_t));
CPU_FOREACH(cpu) {
- apic_iter = APIC_COMMON(X86_CPU(cpu)->env.apic_state);
+ apic_iter = APIC_COMMON(X86_CPU(cpu)->apic_state);
if (apic_iter->dest_mode == 0xf) {
if (dest & apic_iter->log_dest) {
apic_set_bit(deliver_bitmask, apic_iter->idx);
diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h
index f4fab15..775c82d 100644
--- a/target-i386/cpu-qom.h
+++ b/target-i386/cpu-qom.h
@@ -66,6 +66,10 @@ typedef struct X86CPU {
CPUX86State env;
+ /* in order to simplify APIC support, we leave this pointer to the
+ user */
+ struct DeviceState *apic_state;
+
bool hyperv_vapic;
bool hyperv_relaxed_timing;
int hyperv_spinlock_attempts;
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index d0c9bdb..c9d5626 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2415,7 +2415,7 @@ static void x86_cpu_reset(CPUState *s)
#if !defined(CONFIG_USER_ONLY)
/* We hard-wire the BSP to the first CPU. */
if (s->cpu_index == 0) {
- apic_designate_bsp(env->apic_state);
+ apic_designate_bsp(cpu->apic_state);
}
s->halted = !cpu_is_bsp(cpu);
@@ -2425,7 +2425,7 @@ static void x86_cpu_reset(CPUState *s)
#ifndef CONFIG_USER_ONLY
bool cpu_is_bsp(X86CPU *cpu)
{
- return cpu_get_apic_base(cpu->env.apic_state) & MSR_IA32_APICBASE_BSP;
+ return cpu_get_apic_base(cpu->apic_state) & MSR_IA32_APICBASE_BSP;
}
/* TODO: remove me, when reset over QOM tree is implemented */
@@ -2466,31 +2466,29 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
apic_type = "xen-apic";
}
- env->apic_state = qdev_try_create(qdev_get_parent_bus(dev), apic_type);
- if (env->apic_state == NULL) {
+ cpu->apic_state = qdev_try_create(qdev_get_parent_bus(dev), apic_type);
+ if (cpu->apic_state == NULL) {
error_setg(errp, "APIC device '%s' could not be created", apic_type);
return;
}
object_property_add_child(OBJECT(cpu), "apic",
- OBJECT(env->apic_state), NULL);
- qdev_prop_set_uint8(env->apic_state, "id", env->cpuid_apic_id);
+ OBJECT(cpu->apic_state), NULL);
+ qdev_prop_set_uint8(cpu->apic_state, "id", env->cpuid_apic_id);
/* TODO: convert to link<> */
- apic = APIC_COMMON(env->apic_state);
+ apic = APIC_COMMON(cpu->apic_state);
apic->cpu = cpu;
}
static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
{
- CPUX86State *env = &cpu->env;
-
- if (env->apic_state == NULL) {
+ if (cpu->apic_state == NULL) {
return;
}
- if (qdev_init(env->apic_state)) {
+ if (qdev_init(cpu->apic_state)) {
error_setg(errp, "APIC device '%s' could not be initialized",
- object_get_typename(OBJECT(env->apic_state)));
+ object_get_typename(OBJECT(cpu->apic_state)));
return;
}
}
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 5723eff..fdc0f81 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -891,10 +891,6 @@ typedef struct CPUX86State {
int tsc_khz;
void *kvm_xsave_buf;
- /* in order to simplify APIC support, we leave this pointer to the
- user */
- struct DeviceState *apic_state;
-
uint64_t mcg_cap;
uint64_t mcg_ctl;
uint64_t mce_banks[MCE_BANKS_DEF*4];
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 7c196ff..f2e76ad 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1248,7 +1248,8 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access)
} else {
cpu_restore_state(env, env->mem_io_pc);
- apic_handle_tpr_access_report(env->apic_state, env->eip, access);
+ apic_handle_tpr_access_report(x86_env_get_cpu(env)->apic_state,
+ env->eip, access);
}
}
#endif /* !CONFIG_USER_ONLY */
@@ -1295,14 +1296,12 @@ void do_cpu_init(X86CPU *cpu)
cpu_reset(cs);
cs->interrupt_request = sipi;
env->pat = pat;
- apic_init_reset(env->apic_state);
+ apic_init_reset(cpu->apic_state);
}
void do_cpu_sipi(X86CPU *cpu)
{
- CPUX86State *env = &cpu->env;
-
- apic_sipi(env->apic_state);
+ apic_sipi(cpu->apic_state);
}
#else
void do_cpu_init(X86CPU *cpu)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 749aa09..db2f218 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1074,8 +1074,8 @@ static int kvm_put_sregs(X86CPU *cpu)
sregs.cr3 = env->cr[3];
sregs.cr4 = env->cr[4];
- sregs.cr8 = cpu_get_apic_tpr(env->apic_state);
- sregs.apic_base = cpu_get_apic_base(env->apic_state);
+ sregs.cr8 = cpu_get_apic_tpr(cpu->apic_state);
+ sregs.apic_base = cpu_get_apic_base(cpu->apic_state);
sregs.efer = env->efer;
@@ -1624,8 +1624,7 @@ static int kvm_get_mp_state(X86CPU *cpu)
static int kvm_get_apic(X86CPU *cpu)
{
- CPUX86State *env = &cpu->env;
- DeviceState *apic = env->apic_state;
+ DeviceState *apic = cpu->apic_state;
struct kvm_lapic_state kapic;
int ret;
@@ -1642,8 +1641,7 @@ static int kvm_get_apic(X86CPU *cpu)
static int kvm_put_apic(X86CPU *cpu)
{
- CPUX86State *env = &cpu->env;
- DeviceState *apic = env->apic_state;
+ DeviceState *apic = cpu->apic_state;
struct kvm_lapic_state kapic;
if (apic && kvm_irqchip_in_kernel()) {
@@ -1967,7 +1965,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run)
}
DPRINTF("setting tpr\n");
- run->cr8 = cpu_get_apic_tpr(env->apic_state);
+ run->cr8 = cpu_get_apic_tpr(x86_cpu->apic_state);
}
}
@@ -1981,8 +1979,8 @@ void kvm_arch_post_run(CPUState *cpu, struct kvm_run *run)
} else {
env->eflags &= ~IF_MASK;
}
- cpu_set_apic_tpr(env->apic_state, run->cr8);
- cpu_set_apic_base(env->apic_state, run->apic_base);
+ cpu_set_apic_tpr(x86_cpu->apic_state, run->cr8);
+ cpu_set_apic_base(x86_cpu->apic_state, run->apic_base);
}
int kvm_arch_process_async_events(CPUState *cs)
@@ -2019,7 +2017,7 @@ int kvm_arch_process_async_events(CPUState *cs)
if (cs->interrupt_request & CPU_INTERRUPT_POLL) {
cs->interrupt_request &= ~CPU_INTERRUPT_POLL;
- apic_poll_irq(env->apic_state);
+ apic_poll_irq(cpu->apic_state);
}
if (((cs->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) ||
@@ -2037,7 +2035,7 @@ int kvm_arch_process_async_events(CPUState *cs)
if (cs->interrupt_request & CPU_INTERRUPT_TPR) {
cs->interrupt_request &= ~CPU_INTERRUPT_TPR;
kvm_cpu_synchronize_state(cs);
- apic_handle_tpr_access_report(env->apic_state, env->eip,
+ apic_handle_tpr_access_report(cpu->apic_state, env->eip,
env->tpr_access_type);
}
@@ -2061,11 +2059,10 @@ static int kvm_handle_halt(X86CPU *cpu)
static int kvm_handle_tpr_access(X86CPU *cpu)
{
- CPUX86State *env = &cpu->env;
CPUState *cs = CPU(cpu);
struct kvm_run *run = cs->kvm_run;
- apic_handle_tpr_access_report(env->apic_state, run->tpr_access.rip,
+ apic_handle_tpr_access_report(cpu->apic_state, run->tpr_access.rip,
run->tpr_access.is_write ? TPR_ACCESS_WRITE
: TPR_ACCESS_READ);
return 1;
diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c
index 93933fd..52424f4 100644
--- a/target-i386/misc_helper.c
+++ b/target-i386/misc_helper.c
@@ -155,7 +155,7 @@ target_ulong helper_read_crN(CPUX86State *env, int reg)
break;
case 8:
if (!(env->hflags2 & HF2_VINTR_MASK)) {
- val = cpu_get_apic_tpr(env->apic_state);
+ val = cpu_get_apic_tpr(x86_env_get_cpu(env)->apic_state);
} else {
val = env->v_tpr;
}
@@ -179,7 +179,7 @@ void helper_write_crN(CPUX86State *env, int reg, target_ulong t0)
break;
case 8:
if (!(env->hflags2 & HF2_VINTR_MASK)) {
- cpu_set_apic_tpr(env->apic_state, t0);
+ cpu_set_apic_tpr(x86_env_get_cpu(env)->apic_state, t0);
}
env->v_tpr = t0 & 0x0f;
break;
@@ -286,7 +286,7 @@ void helper_wrmsr(CPUX86State *env)
env->sysenter_eip = val;
break;
case MSR_IA32_APICBASE:
- cpu_set_apic_base(env->apic_state, val);
+ cpu_set_apic_base(x86_env_get_cpu(env)->apic_state, val);
break;
case MSR_EFER:
{
@@ -437,7 +437,7 @@ void helper_rdmsr(CPUX86State *env)
val = env->sysenter_eip;
break;
case MSR_IA32_APICBASE:
- val = cpu_get_apic_base(env->apic_state);
+ val = cpu_get_apic_base(x86_env_get_cpu(env)->apic_state);
break;
case MSR_EFER:
val = env->efer;
--
1.8.1.4
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