[Qemu-devel] [PATCH target-arm v3 0/8] target-arm: Extend PMCCNTR for ARMv8

[Peter Crosthwaite <peter.crosthwaite@xilinx.com>]

This patch series continues on from Alistairs original PMCCNTR patch
work. The counter is extended to 64-bit. Also adds support for the
PMCCFILTR_EL0 register which allows the counter to be
disabled based on the current EL

V3:
 -Tidy up the arm_ccnt_enabled()
 -Fixed an old commit message refering to the CCNT_ENABLED
  macro
 -Do EL change sync in pstate_write instead of in multiple
  code paths.
 -Addressed PMM V2 review
V2:
 -Fix some typos identified by Christopher Covington
 -Convert the CCNT_ENABLED macro to the arm_ccnt_enabled
  function


Alistair Francis (6):
  target-arm: Make the ARM PMCCNTR register 64-bit
  target-arm: Implement PMCCNTR_EL0 and related registers
  target-arm: Add arm_ccnt_enabled function
  target-arm: Implement pmccntr_sync function
  target-arm: Remove old code and replace with new functions
  target-arm: Implement pmccfiltr_write function

Peter Crosthwaite (2):
  arm: Implement PMCCNTR 32b read-modify-write
  target-arm: Call pmccntr_sync() when swapping ELs

 target-arm/cpu.h    |  30 +++++++++-
 target-arm/helper.c | 166 +++++++++++++++++++++++++++++++++++++++++-----------
 2 files changed, 159 insertions(+), 37 deletions(-)

-- 
2.0.1.1.gfbfc394