[Qemu-devel] [PATCH 0/2] pcie-aer: Fix command pcie_aer_inject_error invalid

[Qemu-devel] [PATCH 0/2] pcie-aer: Fix command pcie_aer_inject_error invalid

[Chen Fan]

set each patch details.

Chen Fan (2):
  pcie_aer: fix typos in pcie_aer_inject_error comment
  pcie-aer: Fix command pcie_aer_inject_error is invalid

 hw/pci/pcie_aer.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

-- 
1.9.3

[Qemu-devel] [PATCH 1/2] pcie_aer: fix typos in pcie_aer_inject_error comment

[Chen Fan]

Refer to "PCI Express Base Spec3.0", this comments can't
fit the description in spec, so we should fix them.

Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
---
 hw/pci/pcie_aer.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 1f4be16..7ca077a 100644
--- a/hw/pci/pcie_aer.c
+++ b/hw/pci/pcie_aer.c
@@ -618,11 +618,11 @@ static bool pcie_aer_inject_uncor_error(PCIEAERInject *inj, bool is_fatal)
  * non-Function specific error must be recorded in all functions.
  * It is the responsibility of the caller of this function.
  * It is also caller's responsibility to determine which function should
- * report the rerror.
+ * report the error.
  *
  * 6.2.4 Error Logging
- * 6.2.5 Sqeunce of Device Error Signaling and Logging Operations
- * table 6-2: Flowchard Showing Sequence of Device Error Signaling and Logging
+ * 6.2.5 Sequence of Device Error Signaling and Logging Operations
+ * table 6-2: Flowchart Showing Sequence of Device Error Signaling and Logging
  *            Operations
  */
 int pcie_aer_inject_error(PCIDevice *dev, const PCIEAERErr *err)
-- 
1.9.3

[Qemu-devel] [PATCH 2/2] pcie-aer: Fix command pcie_aer_inject_error is invalid

[Chen Fan]

in spec "PCI Express 3.0" section 6.2.6 Figure 6-3 virtual bridge part,
the flowchart showing tell us SERR# enable at Bridge Control register
associate with system error at Secondary Status register can send error
message. but bridge_control from dev->config is NULL, and SERR# was set
in dev->wmask in pcie_aer_init() which was implemented by root port and
swith devices, so we should add wmask (for w/r) bit set for bridge control.
we can user command like:
qemu_system_x86_64:
-device ioh3420,bus=pcie.0,addr=1c.0,multifunction=on,port=1,id=bridge1
-device x3130-upstream,bus=bridge1,id=up.1,addr=00.0
-device xio3130-downstream,bus=up.1,id=down.1,port=1,addr=00.0,chassis=5

(qemu) pcie_aer_inject_error net0 POISON_TLP

after that,
guest can output the error message.

Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
---
 hw/pci/pcie_aer.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 7ca077a..571dc92 100644
--- a/hw/pci/pcie_aer.c
+++ b/hw/pci/pcie_aer.c
@@ -231,7 +231,8 @@ pcie_aer_msg_alldev(PCIDevice *dev, const PCIEAERMsg *msg)
  */
 static bool pcie_aer_msg_vbridge(PCIDevice *dev, const PCIEAERMsg *msg)
 {
-    uint16_t bridge_control = pci_get_word(dev->config + PCI_BRIDGE_CONTROL);
+    uint16_t bridge_control = pci_get_word(dev->config + PCI_BRIDGE_CONTROL) |
+                              pci_get_word(dev->wmask + PCI_BRIDGE_CONTROL);
 
     if (pcie_aer_msg_is_uncor(msg)) {
         /* Received System Error */
-- 
1.9.3

Re: [Qemu-devel] [PATCH 0/2] pcie-aer: Fix command pcie_aer_inject_error invalid

[Chen, Fan]

Hi all,

I have sent another patches to implement "pass aer error to guest"
including this patches, so please ignore this.


Thanks,
Chen

On Wed, 2014-11-19 at 12:10 +0800, Chen Fan wrote: 
> set each patch details.
> 
> Chen Fan (2):
>   pcie_aer: fix typos in pcie_aer_inject_error comment
>   pcie-aer: Fix command pcie_aer_inject_error is invalid
> 
>  hw/pci/pcie_aer.c | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
>