From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
To: qemu-devel@nongnu.org
Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org,
zach.pfeffer@xilinx.com, ozaki.ryota@gmail.com,
alistair.francis@xilinx.com, michals@xilinx.com
Subject: [Qemu-devel] [PATCH target-arm v2 00/15] Next Generation Xilinx Zynq SoC
Date: Mon, 2 Mar 2015 16:28:49 -0800 [thread overview]
Message-ID: <cover.1425340265.git.peter.crosthwaite@xilinx.com> (raw)
Hi Peter and all,
Xilinx's next gen SoC has been announced. This series adds a SoC and
board.
Series start with addition of ARM cortex A53 support (P1 and P2). The
Soc skeleton is then added with GIC, EMACs and UARTs are added. The
pre-existing models for GEM and UART are not SoC friendly (no visible
state struct), so those are refactored for SoC.
Create a model of the EP108 board. Currently this doesn't have any
EP108 specific features but is a usable board exposing the user visible
features of the raw SoC.
changed since v1:
Addressed Alistair review (individual changes on resp. patches)
Changed board name to EP108
Changed naming scheme to "zynqmp" / "ZYNQMP" (Michal review)
Regards,
Peter
Peter Crosthwaite (15):
target-arm: cpu64: Factor out ARM cortex init
target-arm: cpu64: Add support for cortex-a53
arm: Introduce Xilinx ZynqMP SoC
arm: xlnx-zynqmp: Add GIC
arm: xlnx-zynqmp: Connect CPU Timers to GIC
net: cadence_gem: Clean up variable names
net: cadence_gem: Split state struct and type into header
arm: xilinx-zynqmp: Add GEM support
char: cadence_uart: Clean up variable names
char: cadence_uart: Split state struct and type into header
arm: xilinx-zynqmp: Add UART support
arm: Add xlnx-ep108 machine
arm: xilinx-ep108: Add external RAM
arm: xilinx-ep108: Add bootloading
arm: xlnx-zynqmp: Add PSCI setup
default-configs/aarch64-softmmu.mak | 2 +-
hw/arm/Makefile.objs | 1 +
hw/arm/xlnx-ep108.c | 81 +++++++++++++++++
hw/arm/xlnx-zynqmp.c | 167 ++++++++++++++++++++++++++++++++++++
hw/char/cadence_uart.c | 113 ++++++++++--------------
hw/net/cadence_gem.c | 95 ++++++--------------
include/hw/arm/xlnx-zynqmp.h | 29 +++++++
include/hw/char/cadence_uart.h | 35 ++++++++
include/hw/net/cadence_gem.h | 49 +++++++++++
target-arm/cpu64.c | 47 +++++++---
10 files changed, 470 insertions(+), 149 deletions(-)
create mode 100644 hw/arm/xlnx-ep108.c
create mode 100644 hw/arm/xlnx-zynqmp.c
create mode 100644 include/hw/arm/xlnx-zynqmp.h
create mode 100644 include/hw/char/cadence_uart.h
create mode 100644 include/hw/net/cadence_gem.h
--
2.3.0.1.g27a12f1
next reply other threads:[~2015-03-03 1:03 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-03 0:28 Peter Crosthwaite [this message]
2015-03-03 0:28 ` [Qemu-devel] [PATCH target-arm v2 01/15] target-arm: cpu64: Factor out ARM cortex init Peter Crosthwaite
2015-03-05 12:12 ` Alex Bennée
2015-03-03 0:28 ` [Qemu-devel] [PATCH target-arm v2 02/15] target-arm: cpu64: Add support for cortex-a53 Peter Crosthwaite
2015-03-05 12:12 ` Alex Bennée
2015-03-03 0:28 ` [Qemu-devel] [PATCH target-arm v2 03/15] arm: Introduce Xilinx ZynqMP SoC Peter Crosthwaite
2015-03-05 4:41 ` Alistair Francis
2015-03-16 9:26 ` Peter Crosthwaite
2015-03-03 0:28 ` [Qemu-devel] [PATCH target-arm v2 04/15] arm: xlnx-zynqmp: Add GIC Peter Crosthwaite
2015-03-03 0:28 ` [Qemu-devel] [PATCH target-arm v2 05/15] arm: xlnx-zynqmp: Connect CPU Timers to GIC Peter Crosthwaite
2015-03-03 0:28 ` [Qemu-devel] [PATCH target-arm v2 06/15] net: cadence_gem: Clean up variable names Peter Crosthwaite
2015-03-05 12:17 ` Alex Bennée
2015-03-03 0:28 ` [Qemu-devel] [PATCH target-arm v2 07/15] net: cadence_gem: Split state struct and type into header Peter Crosthwaite
2015-03-03 0:28 ` [Qemu-devel] [PATCH target-arm v2 09/15] char: cadence_uart: Clean up variable names Peter Crosthwaite
2015-03-03 0:28 ` [Qemu-devel] [PATCH target-arm v2 12/15] arm: Add xlnx-ep108 machine Peter Crosthwaite
2015-03-03 0:28 ` [Qemu-devel] [PATCH target-arm v2 10/15] char: cadence_uart: Split state struct and type into header Peter Crosthwaite
2015-03-03 0:28 ` [Qemu-devel] [PATCH target-arm v2 13/15] arm: xilinx-ep108: Add external RAM Peter Crosthwaite
2015-03-03 0:28 ` [Qemu-devel] [PATCH target-arm v2 15/15] arm: xlnx-zynqmp: Add PSCI setup Peter Crosthwaite
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