[Qemu-devel] [PATCH v2 0/5] Expose the secure and virt properties to the

[Qemu-devel] [PATCH v2 0/5] Expose the secure and virt properties to the

[Alistair Francis]

The EL2 and EL3 work is working well now and interanlly we now have
tests that expect to start in EL3 and transition through EL2 to EL1. To
make this easy to run let's expose the secure property to the machine
and also add a virt property that can enable EL2.

This series also does some machine/name tidying up and makes the first
move to deprecating the EP108 machine, which was just an early access
development board.

V2:
 - Add a virt option for setting EL2



Alistair Francis (5):
  xlnx-ep108: Rename to ZCU102
  xlnx-zcu102: Manually create the machines
  xlnx-zcu102: Add a machine level secure property
  xlnx-zcu102: Add a machine level virtualization property
  xlnx-zcu102: Mark the EP108 machine as deprecated

 hw/arm/Makefile.objs         |   2 +-
 hw/arm/xlnx-ep108.c          | 137 -----------------------
 hw/arm/xlnx-zcu102.c         | 257 +++++++++++++++++++++++++++++++++++++++++++
 hw/arm/xlnx-zynqmp.c         |   3 +-
 include/hw/arm/xlnx-zynqmp.h |   2 +
 5 files changed, 262 insertions(+), 139 deletions(-)
 delete mode 100644 hw/arm/xlnx-ep108.c
 create mode 100644 hw/arm/xlnx-zcu102.c

-- 
2.11.0

[Qemu-devel] [PATCH v2 4/5] xlnx-zcu102: Add a machine level virtualization property

[Alistair Francis]

Add a machine level virtualization property. This defaults to false and can be
set to true using this machine command line argument:
    -machine xlnx-zcu102,virtualization=on

This follows what the ARM virt machine does.

This property only applies to the ZCU102 machine. The EP108 machine does
not have this property.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
---

 hw/arm/xlnx-zcu102.c         | 30 +++++++++++++++++++++++++++++-
 hw/arm/xlnx-zynqmp.c         |  3 ++-
 include/hw/arm/xlnx-zynqmp.h |  2 ++
 3 files changed, 33 insertions(+), 2 deletions(-)

diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
index 080507831a..40c1f5bbf6 100644
--- a/hw/arm/xlnx-zcu102.c
+++ b/hw/arm/xlnx-zcu102.c
@@ -32,6 +32,7 @@ typedef struct XlnxZCU102 {
     MemoryRegion ddr_ram;
 
     bool secure;
+    bool virt;
 } XlnxZCU102;
 
 #define TYPE_ZCU102_MACHINE   MACHINE_TYPE_NAME("xlnx-zcu102")
@@ -58,6 +59,20 @@ static void zcu102_set_secure(Object *obj, bool value, Error **errp)
     s->secure = value;
 }
 
+static bool zcu102_get_virt(Object *obj, Error **errp)
+{
+    XlnxZCU102 *s = ZCU102_MACHINE(obj);
+
+    return s->virt;
+}
+
+static void zcu102_set_virt(Object *obj, bool value, Error **errp)
+{
+    XlnxZCU102 *s = ZCU102_MACHINE(obj);
+
+    s->virt = value;
+}
+
 static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine)
 {
     int i;
@@ -87,6 +102,8 @@ static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine)
                          "ddr-ram", &error_abort);
     object_property_set_bool(OBJECT(&s->soc), s->secure, "secure",
                              &error_fatal);
+    object_property_set_bool(OBJECT(&s->soc), s->virt, "virtualization",
+                             &error_fatal);
 
     object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);
 
@@ -154,8 +171,9 @@ static void xlnx_ep108_machine_instance_init(Object *obj)
 {
     XlnxZCU102 *s = EP108_MACHINE(obj);
 
-    /* EP108, we don't support setting secure */
+    /* EP108, we don't support setting secure or virt */
     s->secure = false;
+    s->virt = false;
 }
 
 static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data)
@@ -200,6 +218,16 @@ static void xlnx_zcu102_machine_instance_init(Object *obj)
                                     "Set on/off to enable/disable the ARM "
                                     "Security Extensions (TrustZone)",
                                     NULL);
+
+    /* Default to virt (EL2) being disabled */
+    s->virt = false;
+    object_property_add_bool(obj, "virtualization", zcu102_get_virt,
+                             zcu102_set_virt, NULL);
+    object_property_set_description(obj, "virtualization",
+                                    "Set on/off to enable/disable emulating a "
+                                    "guest CPU which implements the ARM "
+                                    "Virtualization Extensions",
+                                    NULL);
 }
 
 static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 9eceadbdc8..37a8bf2ccd 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -260,7 +260,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
         object_property_set_bool(OBJECT(&s->apu_cpu[i]),
                                  s->secure, "has_el3", NULL);
         object_property_set_bool(OBJECT(&s->apu_cpu[i]),
-                                 false, "has_el2", NULL);
+                                 s->virt, "has_el2", NULL);
         object_property_set_int(OBJECT(&s->apu_cpu[i]), GIC_BASE_ADDR,
                                 "reset-cbar", &error_abort);
         object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized",
@@ -432,6 +432,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
 static Property xlnx_zynqmp_props[] = {
     DEFINE_PROP_STRING("boot-cpu", XlnxZynqMPState, boot_cpu),
     DEFINE_PROP_BOOL("secure", XlnxZynqMPState, secure, false),
+    DEFINE_PROP_BOOL("virtualization", XlnxZynqMPState, virt, false),
     DEFINE_PROP_BOOL("has_rpu", XlnxZynqMPState, has_rpu, false),
     DEFINE_PROP_END_OF_LIST()
 };
diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
index c2931bf39c..6eff81a995 100644
--- a/include/hw/arm/xlnx-zynqmp.h
+++ b/include/hw/arm/xlnx-zynqmp.h
@@ -91,6 +91,8 @@ typedef struct XlnxZynqMPState {
 
     /* Has the ARM Security extensions?  */
     bool secure;
+    /* Has the ARM Virtualization extensions?  */
+    bool virt;
     /* Has the RPU subsystem?  */
     bool has_rpu;
 }  XlnxZynqMPState;
-- 
2.11.0

[Qemu-devel] [PATCH v2 5/5] xlnx-zcu102: Mark the EP108 machine as deprecated

[Alistair Francis]

The EP108 is the same as the ZCU102, mark it as deprecated as we don't
need two machines.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
---

 hw/arm/xlnx-zcu102.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
index 40c1f5bbf6..d3694f67db 100644
--- a/hw/arm/xlnx-zcu102.c
+++ b/hw/arm/xlnx-zcu102.c
@@ -180,7 +180,7 @@ static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data)
 {
     MachineClass *mc = MACHINE_CLASS(oc);
 
-    mc->desc = "Xilinx ZynqMP EP108 board";
+    mc->desc = "Xilinx ZynqMP EP108 board (Deprecated, please use xlnx-zcu102)";
     mc->init = xlnx_ep108_init;
     mc->block_default_type = IF_IDE;
     mc->units_per_default_bus = 1;
-- 
2.11.0

Re: [Qemu-devel] [PATCH v2 0/5] Expose the secure and virt properties to the

[Peter Maydell]

On 1 September 2017 at 00:34, Alistair Francis
<alistair.francis@xilinx.com> wrote:
>
> The EL2 and EL3 work is working well now and interanlly we now have
> tests that expect to start in EL3 and transition through EL2 to EL1. To
> make this easy to run let's expose the secure property to the machine
> and also add a virt property that can enable EL2.
>
> This series also does some machine/name tidying up and makes the first
> move to deprecating the EP108 machine, which was just an early access
> development board.
>
> V2:
>  - Add a virt option for setting EL2

It looks like only patches 4 5 and the cover letter got through the
mailing list server, so patches and patchwork don't have the whole
thing. Could I ask you to try a resend?

thanks
-- PMM

Re: [Qemu-devel] [PATCH v2 0/5] Expose the secure and virt properties to the

[Alistair Francis]

On Thu, Sep 7, 2017 at 5:51 AM, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 1 September 2017 at 00:34, Alistair Francis
> <alistair.francis@xilinx.com> wrote:
>>
>> The EL2 and EL3 work is working well now and interanlly we now have
>> tests that expect to start in EL3 and transition through EL2 to EL1. To
>> make this easy to run let's expose the secure property to the machine
>> and also add a virt property that can enable EL2.
>>
>> This series also does some machine/name tidying up and makes the first
>> move to deprecating the EP108 machine, which was just an early access
>> development board.
>>
>> V2:
>>  - Add a virt option for setting EL2
>
> It looks like only patches 4 5 and the cover letter got through the
> mailing list server, so patches and patchwork don't have the whole
> thing. Could I ask you to try a resend?

Just re-sent now. Hopefully it works this time.

Thanks,
Alistair

>
> thanks
> -- PMM

Re: [Qemu-devel] [PATCH v2 0/5] Expose the secure and virt properties to the

[Alistair Francis]

On Thu, Sep 7, 2017 at 9:01 AM, Alistair Francis
<alistair.francis@xilinx.com> wrote:
> On Thu, Sep 7, 2017 at 5:51 AM, Peter Maydell <peter.maydell@linaro.org> wrote:
>> On 1 September 2017 at 00:34, Alistair Francis
>> <alistair.francis@xilinx.com> wrote:
>>>
>>> The EL2 and EL3 work is working well now and interanlly we now have
>>> tests that expect to start in EL3 and transition through EL2 to EL1. To
>>> make this easy to run let's expose the secure property to the machine
>>> and also add a virt property that can enable EL2.
>>>
>>> This series also does some machine/name tidying up and makes the first
>>> move to deprecating the EP108 machine, which was just an early access
>>> development board.
>>>
>>> V2:
>>>  - Add a virt option for setting EL2
>>
>> It looks like only patches 4 5 and the cover letter got through the
>> mailing list server, so patches and patchwork don't have the whole
>> thing. Could I ask you to try a resend?
>
> Just re-sent now. Hopefully it works this time.

It looks like patch 1 and 3 still didn't make it through. I see them
leaving the corporate network and going through to my personal email.

Can anyone see anything on the QEMU mail server side? Any logs might
help me push IT to investigate.

Thanks,
Alistair

>
> Thanks,
> Alistair
>
>>
>> thanks
>> -- PMM

Re: [Qemu-devel] [PATCH v2 0/5] Expose the secure and virt properties to the

[Peter Maydell]

On 7 September 2017 at 17:29, Alistair Francis
<alistair.francis@xilinx.com> wrote:
> It looks like patch 1 and 3 still didn't make it through. I see them
> leaving the corporate network and going through to my personal email.
>
> Can anyone see anything on the QEMU mail server side? Any logs might
> help me push IT to investigate.

Unfortunately we don't really have much visibility into what
the mail server is doing, because it's run by nongnu.org.
It does seem to have a habit of occasionally eating patches
(maybe it thinks they're spam or something).

thanks
-- PMM

Re: [Qemu-devel] [PATCH v2 0/5] Expose the secure and virt properties to the

[Alistair Francis]

On Thu, Sep 7, 2017 at 9:33 AM, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 7 September 2017 at 17:29, Alistair Francis
> <alistair.francis@xilinx.com> wrote:
>> It looks like patch 1 and 3 still didn't make it through. I see them
>> leaving the corporate network and going through to my personal email.
>>
>> Can anyone see anything on the QEMU mail server side? Any logs might
>> help me push IT to investigate.
>
> Unfortunately we don't really have much visibility into what
> the mail server is doing, because it's run by nongnu.org.
> It does seem to have a habit of occasionally eating patches
> (maybe it thinks they're spam or something).

Hmmm... I'm not sure how to look into this then, as I can see the
patches going through to my personal email address, so it's hard to
place the blame on the Xilinx mail server.

Do you want me to try sending out patches 1 and 3 again?

Thanks,
Alistair

>
> thanks
> -- PMM
>

Re: [Qemu-devel] [PATCH v2 0/5] Expose the secure and virt properties to the

[Richard Henderson]

On 09/07/2017 09:48 AM, Alistair Francis wrote:
> Hmmm... I'm not sure how to look into this then, as I can see the
> patches going through to my personal email address, so it's hard to
> place the blame on the Xilinx mail server.
> 
> Do you want me to try sending out patches 1 and 3 again?

I had this problem with one of my patch sets earlier this year.
In the end it seemed easier to post a link to a public git tree.


r~

Re: [Qemu-devel] [PATCH v2 0/5] Expose the secure and virt properties to the

[Peter Maydell]

On 7 September 2017 at 19:06, Richard Henderson
<richard.henderson@linaro.org> wrote:
> On 09/07/2017 09:48 AM, Alistair Francis wrote:
>> Hmmm... I'm not sure how to look into this then, as I can see the
>> patches going through to my personal email address, so it's hard to
>> place the blame on the Xilinx mail server.
>>
>> Do you want me to try sending out patches 1 and 3 again?
>
> I had this problem with one of my patch sets earlier this year.
> In the end it seemed easier to post a link to a public git tree.

Being on the direct cc list I get all the patches anyway, so
it's mostly an issue for (1) review by other people not directly
cc'd and (2) the automated tools (I can apply stuff by hand from
direct email but it's a pain as I have to manually save and
then git am every email in the set).

thanks
-- PMM

Re: [Qemu-devel] [PATCH v2 0/5] Expose the secure and virt properties to the

[Alistair Francis]

On Thu, Sep 7, 2017 at 11:08 AM, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 7 September 2017 at 19:06, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>> On 09/07/2017 09:48 AM, Alistair Francis wrote:
>>> Hmmm... I'm not sure how to look into this then, as I can see the
>>> patches going through to my personal email address, so it's hard to
>>> place the blame on the Xilinx mail server.
>>>
>>> Do you want me to try sending out patches 1 and 3 again?
>>
>> I had this problem with one of my patch sets earlier this year.
>> In the end it seemed easier to post a link to a public git tree.
>
> Being on the direct cc list I get all the patches anyway, so
> it's mostly an issue for (1) review by other people not directly
> cc'd and (2) the automated tools (I can apply stuff by hand from
> direct email but it's a pain as I have to manually save and
> then git am every email in the set).

The patches can be found here:
https://github.com/Xilinx/qemu/tree/mainline/alistair/secure.next
That'll save you manually downloading them.

That's probably the best I can do for this series as they don't seem
to want to go through.

Thanks,
Alistair

>
> thanks
> -- PMM
>

[Qemu-devel] [PATCH Resend v2 2/5] xlnx-zcu102: Manually create the machines

[Alistair Francis]

In preperation for future work let's manually create the Xilnx machines.
This will allow us to set properties for the machines in the future.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
---

V2:
 - Remove stray newline

 hw/arm/xlnx-zcu102.c | 74 +++++++++++++++++++++++++++++++++++++++++++++++-----
 1 file changed, 67 insertions(+), 7 deletions(-)

diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
index 133a6a31a8..03dcd67bd8 100644
--- a/hw/arm/xlnx-zcu102.c
+++ b/hw/arm/xlnx-zcu102.c
@@ -26,15 +26,24 @@
 #include "qemu/log.h"
 
 typedef struct XlnxZCU102 {
+    MachineState parent_obj;
+
     XlnxZynqMPState soc;
     MemoryRegion ddr_ram;
 } XlnxZCU102;
 
+#define TYPE_ZCU102_MACHINE   MACHINE_TYPE_NAME("xlnx-zcu102")
+#define ZCU102_MACHINE(obj) \
+    OBJECT_CHECK(XlnxZCU102, (obj), TYPE_ZCU102_MACHINE)
+
+#define TYPE_EP108_MACHINE   MACHINE_TYPE_NAME("xlnx-ep108")
+#define EP108_MACHINE(obj) \
+    OBJECT_CHECK(XlnxZCU102, (obj), TYPE_EP108_MACHINE)
+
 static struct arm_boot_info xlnx_zcu102_binfo;
 
-static void xlnx_zcu102_init(MachineState *machine)
+static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine)
 {
-    XlnxZCU102 *s = g_new0(XlnxZCU102, 1);
     int i;
     uint64_t ram_size = machine->ram_size;
 
@@ -116,22 +125,73 @@ static void xlnx_zcu102_init(MachineState *machine)
     arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo);
 }
 
-static void xlnx_ep108_machine_init(MachineClass *mc)
+static void xlnx_ep108_init(MachineState *machine)
+{
+    XlnxZCU102 *s = EP108_MACHINE(machine);
+
+    xlnx_zynqmp_init(s, machine);
+}
+
+static void xlnx_ep108_machine_instance_init(Object *obj)
 {
+}
+
+static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data)
+{
+    MachineClass *mc = MACHINE_CLASS(oc);
+
     mc->desc = "Xilinx ZynqMP EP108 board";
-    mc->init = xlnx_zcu102_init;
+    mc->init = xlnx_ep108_init;
     mc->block_default_type = IF_IDE;
     mc->units_per_default_bus = 1;
 }
 
-DEFINE_MACHINE("xlnx-ep108", xlnx_ep108_machine_init)
+static const TypeInfo xlnx_ep108_machine_init_typeinfo = {
+    .name       = MACHINE_TYPE_NAME("xlnx-ep108"),
+    .parent     = TYPE_MACHINE,
+    .class_init = xlnx_ep108_machine_class_init,
+    .instance_init = xlnx_ep108_machine_instance_init,
+    .instance_size = sizeof(XlnxZCU102),
+};
 
-static void xlnx_zcu102_machine_init(MachineClass *mc)
+static void xlnx_ep108_machine_init_register_types(void)
 {
+    type_register_static(&xlnx_ep108_machine_init_typeinfo);
+}
+
+static void xlnx_zcu102_init(MachineState *machine)
+{
+    XlnxZCU102 *s = ZCU102_MACHINE(machine);
+
+    xlnx_zynqmp_init(s, machine);
+}
+
+static void xlnx_zcu102_machine_instance_init(Object *obj)
+{
+}
+
+static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
+{
+    MachineClass *mc = MACHINE_CLASS(oc);
+
     mc->desc = "Xilinx ZynqMP ZCU102 board";
     mc->init = xlnx_zcu102_init;
     mc->block_default_type = IF_IDE;
     mc->units_per_default_bus = 1;
 }
 
-DEFINE_MACHINE("xlnx-zcu102", xlnx_zcu102_machine_init)
+static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
+    .name       = MACHINE_TYPE_NAME("xlnx-zcu102"),
+    .parent     = TYPE_MACHINE,
+    .class_init = xlnx_zcu102_machine_class_init,
+    .instance_init = xlnx_zcu102_machine_instance_init,
+    .instance_size = sizeof(XlnxZCU102),
+};
+
+static void xlnx_zcu102_machine_init_register_types(void)
+{
+    type_register_static(&xlnx_zcu102_machine_init_typeinfo);
+}
+
+type_init(xlnx_zcu102_machine_init_register_types)
+type_init(xlnx_ep108_machine_init_register_types)
-- 
2.11.0

Re: [Qemu-devel] [PATCH Resend v2 0/5] Expose the secure and virt properties to the

[Edgar E. Iglesias]

On Thu, Sep 07, 2017 at 08:56:55AM -0700, Alistair Francis wrote:
> 
> The EL2 and EL3 work is working well now and interanlly we now have
> tests that expect to start in EL3 and transition through EL2 to EL1. To
> make this easy to run let's expose the secure property to the machine
> and also add a virt property that can enable EL2.
> 
> This series also does some machine/name tidying up and makes the first
> move to deprecating the EP108 machine, which was just an early access
> development board.
> 
> V2:
>  - Add a virt option for setting EL2


Thanks Alistair!
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>



> 
> 
> 
> Alistair Francis (5):
>   xlnx-ep108: Rename to ZCU102
>   xlnx-zcu102: Manually create the machines
>   xlnx-zcu102: Add a machine level secure property
>   xlnx-zcu102: Add a machine level virtualization property
>   xlnx-zcu102: Mark the EP108 machine as deprecated
> 
>  hw/arm/Makefile.objs         |   2 +-
>  hw/arm/xlnx-ep108.c          | 137 -----------------------
>  hw/arm/xlnx-zcu102.c         | 257 +++++++++++++++++++++++++++++++++++++++++++
>  hw/arm/xlnx-zynqmp.c         |   3 +-
>  include/hw/arm/xlnx-zynqmp.h |   2 +
>  5 files changed, 262 insertions(+), 139 deletions(-)
>  delete mode 100644 hw/arm/xlnx-ep108.c
>  create mode 100644 hw/arm/xlnx-zcu102.c
> 
> -- 
> 2.11.0
> 

Re: [Qemu-devel] [PATCH Resend v2 0/5] Expose the secure and virt properties to the

[Alistair Francis]

On Thu, Sep 7, 2017 at 2:35 PM, Edgar E. Iglesias
<edgar.iglesias@xilinx.com> wrote:
> On Thu, Sep 07, 2017 at 08:56:55AM -0700, Alistair Francis wrote:
>>
>> The EL2 and EL3 work is working well now and interanlly we now have
>> tests that expect to start in EL3 and transition through EL2 to EL1. To
>> make this easy to run let's expose the secure property to the machine
>> and also add a virt property that can enable EL2.
>>
>> This series also does some machine/name tidying up and makes the first
>> move to deprecating the EP108 machine, which was just an early access
>> development board.
>>
>> V2:
>>  - Add a virt option for setting EL2
>
>
> Thanks Alistair!
> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Thanks Edgar.

@Peter I updated the patches on the git branch I pasted earlier to
include Edgar's review.

Thanks,
Alistair

>
>
>
>>
>>
>>
>> Alistair Francis (5):
>>   xlnx-ep108: Rename to ZCU102
>>   xlnx-zcu102: Manually create the machines
>>   xlnx-zcu102: Add a machine level secure property
>>   xlnx-zcu102: Add a machine level virtualization property
>>   xlnx-zcu102: Mark the EP108 machine as deprecated
>>
>>  hw/arm/Makefile.objs         |   2 +-
>>  hw/arm/xlnx-ep108.c          | 137 -----------------------
>>  hw/arm/xlnx-zcu102.c         | 257 +++++++++++++++++++++++++++++++++++++++++++
>>  hw/arm/xlnx-zynqmp.c         |   3 +-
>>  include/hw/arm/xlnx-zynqmp.h |   2 +
>>  5 files changed, 262 insertions(+), 139 deletions(-)
>>  delete mode 100644 hw/arm/xlnx-ep108.c
>>  create mode 100644 hw/arm/xlnx-zcu102.c
>>
>> --
>> 2.11.0
>>

Re: [Qemu-devel] [PATCH Resend v2 0/5] Expose the secure and virt properties to the

[Peter Maydell]

On 7 September 2017 at 22:44, Alistair Francis
<alistair.francis@xilinx.com> wrote:
> On Thu, Sep 7, 2017 at 2:35 PM, Edgar E. Iglesias
> <edgar.iglesias@xilinx.com> wrote:
>> On Thu, Sep 07, 2017 at 08:56:55AM -0700, Alistair Francis wrote:
>>>
>>> The EL2 and EL3 work is working well now and interanlly we now have
>>> tests that expect to start in EL3 and transition through EL2 to EL1. To
>>> make this easy to run let's expose the secure property to the machine
>>> and also add a virt property that can enable EL2.
>>>
>>> This series also does some machine/name tidying up and makes the first
>>> move to deprecating the EP108 machine, which was just an early access
>>> development board.
>>>
>>> V2:
>>>  - Add a virt option for setting EL2
>>
>>
>> Thanks Alistair!
>> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
>
> Thanks Edgar.
>
> @Peter I updated the patches on the git branch I pasted earlier to
> include Edgar's review.

Thanks. I've applied the patches to target-arm.next.

-- PMM